Patents by Inventor David Hartley

David Hartley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10235303
    Abstract: Techniques for protecting software in a computing device are provided. A method according to these techniques includes receiving a request from a non-secure software module to execute an instruction of a secure software module comprising encrypted program code, determining whether the instruction comprises an instruction associated with a controlled point of entry to the secure software module accessible outside of the secure software module, executing one or more instructions of the secure software module responsive to the instruction comprising an instruction associated with the controlled point of entry to the secure software module, and controlling exit from the secure software module to return execution to the non-secure software module.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: March 19, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: David Hartley, Roberto Avanzi, Rosario Cammarota
  • Patent number: 10223289
    Abstract: In an aspect, a cache memory device receives a request to read an instruction or data associated with a memory device. The request includes a first realm identifier and a realm indicator bit, where the first realm identifier enables identification of a realm that includes one or more selected regions in the memory device. The cache memory device determines whether the first realm identifier matches a second realm identifier in a cache tag when the instruction or data is stored in the cache memory device, where the instruction or data stored in the cache memory device has been decrypted based on an ephemeral encryption key associated with the second realm identifier when the first realm identifier indicates the realm and when the realm indicator bit is enabled. The cache memory device transmits the instruction or data when the first realm identifier matches the second realm identifier.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: March 5, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Roberto Avanzi, David Hartley, Rosario Cammarota
  • Publication number: 20190065405
    Abstract: Several features pertain to computing systems equipped to perform speculative processing and configured to access device memory (e.g. non-speculative or unspeculatable memory) and non-device memory (e.g. speculative or speculatable memory). Malicious attacks may seek to obtain sensitive information from such systems by exploiting speculative code execution. Herein, techniques are described whereby sensitive data is protected from such attacks by placing the data in a page of memory not ordinarily used as device memory, and then designating or marking the page as device memory (e.g. marking the page as unspeculatable). By designating the page as unspeculatable device memory, the processor does not speculatively access the sensitive information (e.g. speculation stops once a branch is invoked that would access the page) and so certain types of attacks can be mitigated.
    Type: Application
    Filed: June 7, 2018
    Publication date: February 28, 2019
    Inventors: Kevin Christopher GOTZE, Can ACAR, David HARTLEY, Qing LI, Daniel GODAS-LOPEZ
  • Patent number: 10209767
    Abstract: In one embodiment, an integrated circuit includes a power management architecture in which one or more pipelines are actively powered and clocked when data is provided for processing, but which are clock gated and in retention when there is no data to be processed. When data is provided to the pipeline, supply voltage may be actively provided to initial stages of the pipeline and the clocks may be ungated when the voltage is stable enough for operation. Subsequent stages of the pipeline may be sequentially provided power and clocks as the data progresses through the pipeline. Initial stages may be clock gated and power may be deactivated when additional data is not provided for processing. Accordingly, when the pipeline is viewed as a whole, power may be seen as rolling forward ahead of the data processing, and power may be inhibited in a similar rolling fashion.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: February 19, 2019
    Assignee: Apple Inc.
    Inventors: Joseph T. DiBene, II, David A. Hartley, Inder M. Sodhi
  • Publication number: 20190015511
    Abstract: Provided herein are ready-to-use premixed pharmaceutical compositions of nicardipine or a pharmaceutically acceptable salt and methods for use in treating cardiovascular and cerebrovascular conditions.
    Type: Application
    Filed: June 18, 2018
    Publication date: January 17, 2019
    Inventors: Michelle Renee Duncan, Supriya Gupta, David Hartley Haas, Norma V. Stephens, Camellia Zamiri
  • Patent number: 10142303
    Abstract: In an aspect, a method for protecting software includes obtaining a payload including at least one of instructions or data, establishing a realm in a memory device, encrypting the payload based on an ephemeral encryption key (EEK) associated with the realm, and storing the encrypted payload in the realm of the memory device. In another aspect, a method for protecting software includes receiving a memory transaction associated with the memory device, the memory transaction including at least a realm identifier (RID) and a realm indicator bit, obtaining the EEK associated with the RID when the RID indicates the realm and when the realm indicator bit is enabled, decrypting an instruction and/or data retrieved from the realm based on the EEK when the memory transaction is a read transaction, and encrypting second data for storage in the realm based on the EEK when the memory transaction is a write transaction.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: November 27, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Roberto Avanzi, David Hartley, Rosario Cammarota
  • Publication number: 20180289718
    Abstract: The present invention provides compounds represented by formula (I), pharmaceutically acceptable salts thereof, N-oxides thereof, solvates thereof or prodrugs thereof (wherein the characters are as defined in the description). The compounds represented by formula (I) have affinity and selectivity for the gamma-aminobutyric acid A receptor subunit alpha 5 (GABAA ?5) and act as GABAA ?5 negative allosteric modulators (GABAA ?5 NAM), so that they are useful in the prevention and/or treatment of diseases which are related to the GABAA ?5 such as Alzheimer's disease.
    Type: Application
    Filed: June 11, 2018
    Publication date: October 11, 2018
    Applicant: ONO PHARMACEUTICAL CO., LTD.
    Inventors: Tetsuji SAITO, Masato HIGASHINO, Soichi KAWAHARADA, Arwel LEWIS, Mark Stuart CHAMBERS, Alastair RAE, Kim Louise HIRST, Charles David HARTLEY
  • Publication number: 20180241778
    Abstract: Aspect may relate to a device that comprises an interface and a processor. The interface may be configured to: obtain a statement from an asserting party exercising an authorization. The processor may be coupled to the interface and the processor may be configured to: implement an evaluator to evaluate the statement from the asserting party with policy verification instructions to determine if the asserting party was authorized to issue the statement.
    Type: Application
    Filed: February 22, 2017
    Publication date: August 23, 2018
    Inventors: Philip Hawkes, David Hartley
  • Patent number: 10016439
    Abstract: The present invention provides compounds represented by formula (I), pharmaceutically acceptable salts thereof, N-oxides thereof, solvates thereof or prodrugs thereof (wherein the characters are as defined in the description). The compounds represented by formula (I) have affinity and selectivity for the gamma-aminobutyric acid A receptor subunit alpha 5 (GABAA ?5) and act as GABAA ?5 negative allosteric modulators (GABAA ?5 NAM), so that they are useful in the prevention and/or treatment of diseases which are related to the GABAA ?5 such as Alzheimer's disease.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: July 10, 2018
    Assignee: ONO PHARMACEUTICAL CO., LTD.
    Inventors: Tetsuji Saito, Masato Higashino, Soichi Kawaharada, Arwel Lewis, Mark Stuart Chambers, Alastair Rae, Kim Louise Hirst, Charles David Hartley
  • Publication number: 20170220100
    Abstract: In one embodiment, an integrated circuit includes a power management architecture in which one or more pipelines are actively powered and clocked when data is provided for processing, but which are clock gated and in retention when there is no data to be processed. When data is provided to the pipeline, supply voltage may be actively provided to initial stages of the pipeline and the clocks may be ungated when the voltage is stable enough for operation. Subsequent stages of the pipeline may be sequentially provided power and clocks as the data progresses through the pipeline. Initial stages may be clock gated and power may be deactivated when additional data is not provided for processing. Accordingly, when the pipeline is viewed as a whole, power may be seen as rolling forward ahead of the data processing, and power may be inhibited in a similar rolling fashion.
    Type: Application
    Filed: May 31, 2016
    Publication date: August 3, 2017
    Inventors: Joseph T. DiBene, II, David A. Hartley, Inder M. Sodhi
  • Publication number: 20170085542
    Abstract: In an aspect, a method for protecting software includes obtaining a payload including at least one of instructions or data, establishing a realm in a memory device, encrypting the payload based on an ephemeral encryption key (EEK) associated with the realm, and storing the encrypted payload in the realm of the memory device. In another aspect, a method for protecting software includes receiving a memory transaction associated with the memory device, the memory transaction including at least a realm identifier (RID) and a realm indicator bit, obtaining the EEK associated with the RID when the RID indicates the realm and when the realm indicator bit is enabled, decrypting an instruction and/or data retrieved from the realm based on the EEK when the memory transaction is a read transaction, and encrypting second data for storage in the realm based on the EEK when the memory transaction is a write transaction.
    Type: Application
    Filed: February 25, 2016
    Publication date: March 23, 2017
    Inventors: Roberto Avanzi, David Hartley, Rosario Cammarota
  • Publication number: 20170075820
    Abstract: Techniques for protecting software in a computing device are provided. A method according to these techniques includes receiving a request from a non-secure software module to execute an instruction of a secure software module comprising encrypted program code, determining whether the instruction comprises an instruction associated with a controlled point of entry to the secure software module accessible outside of the secure software module, executing one or more instructions of the secure software module responsive to the instruction comprising an instruction associated with the controlled point of entry to the secure software module, and controlling exit from the secure software module to return execution to the non-secure software module.
    Type: Application
    Filed: August 9, 2016
    Publication date: March 16, 2017
    Inventors: David HARTLEY, Roberto AVANZI, Rosario CAMMAROTA
  • Patent number: 9580980
    Abstract: A system including a tubing hanger running tool (THRT), including one or more stab connectors, and a planetary gear system, wherein the planetary gear system is configured to couple and uncouple the THRT from a first hydrocarbon extraction component.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: February 28, 2017
    Assignee: Cameron International Corporation
    Inventors: David Hartley, Alan Appleyard, Ted Thornburrow, Paul Hesketh
  • Publication number: 20170010982
    Abstract: In an aspect, a cache memory device receives a request to read an instruction or data associated with a memory device. The request includes a first realm identifier and a realm indicator bit, where the first realm identifier enables identification of a realm that includes one or more selected regions in the memory device. The cache memory device determines whether the first realm identifier matches a second realm identifier in a cache tag when the instruction or data is stored in the cache memory device, where the instruction or data stored in the cache memory device has been decrypted based on an ephemeral encryption key associated with the second realm identifier when the first realm identifier indicates the realm and when the realm indicator bit is enabled. The cache memory device transmits the instruction or data when the first realm identifier matches the second realm identifier.
    Type: Application
    Filed: March 15, 2016
    Publication date: January 12, 2017
    Inventors: Roberto Avanzi, David Hartley, Rosario Cammarota
  • Publication number: 20160358087
    Abstract: A method for generating hypotheses in a corpus of data comprises selecting a form of ontology; coding the corpus of data based on the form of the ontology; generating ontology space based on coding results and the ontology; transforming the ontology space into a hypothesis space by grouping hypotheses; weighing hypotheses included in the hypothesis space; and applying a science-based optimization algorithm configured to model a science-based treatment of the weighted hypotheses.
    Type: Application
    Filed: August 19, 2016
    Publication date: December 8, 2016
    Applicant: Georgetown University
    Inventors: Ophir Frieder, David Hartley
  • Publication number: 20160339104
    Abstract: Provided herein are ready-to-use premixed pharmaceutical compositions of nicardipine or a pharmaceutically acceptable salt and methods for use in treating cardiovascular and cerebrovascular conditions.
    Type: Application
    Filed: May 19, 2016
    Publication date: November 24, 2016
    Inventors: Michelle Renee Duncan, Supriya Gupta, David Hartley Haas, Norma V. Stephens, Camellia Zamiri
  • Publication number: 20160331757
    Abstract: The present invention provides compounds represented by formula (I), pharmaceutically acceptable salts thereof, N-oxides thereof, solvates thereof or prodrugs thereof (wherein the characters are as defined in the description). The compounds represented by formula (I) have affinity and selectivity for the gamma-aminobutyric acid A receptor subunit alpha 5 (GABAA ?5) and act as GABAA ?5 negative allosteric modulators (GABAA ?5 NAM), so that they are useful in the prevention and/or treatment of diseases which are related to the GABAA ?5 such as Alzheimer's disease.
    Type: Application
    Filed: January 30, 2015
    Publication date: November 17, 2016
    Applicant: ONO PHARMACEUTICAL CO., LTD.
    Inventors: Tetsuji SAITO, Masato HIGASHINO, Soichi KAWAHARADA, Arwel LEWIS, Mark Stuart CHAMBERS, Alastair RAE, Kim Louise HIRST, Charles David HARTLEY
  • Patent number: 9495926
    Abstract: Systems, apparatuses, and methods for preventing charge accumulation on a display panel of a display. A display pipeline is configured to drive a display using a variable frame refresh rate. The display may also be driven by a polarity inversion cadence to alternate the polarity on the display panel on back-to-back frames. In some cases, the frame refresh rate cadence, as specified in frame packets which contain configuration data for processing corresponding frames, can cause a charge accumulation on the display panel if an odd number of frames are displayed at a first frame refresh rate before switching to a second frame refresh rate. Accordingly, in these cases, the display pipeline may override the frame refresh rate setting for a given frame to cause an even number of frames to be displayed at the first frame refresh rate.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: November 15, 2016
    Assignee: Apple Inc.
    Inventors: Brijesh Tripathi, Peter F. Holland, Arthur L. Spence, Axel B. Schumacher, David A. Hartley
  • Patent number: 9370586
    Abstract: Provided herein are ready-to-use premixed pharmaceutical compositions of nicardipine or a pharmaceutically acceptable salt and methods for use in treating cardiovascular and cerebrovascular conditions.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: June 21, 2016
    Assignee: EKR Therapeutics, Inc.
    Inventors: Michelle Renee Duncan, Supriya Gupta, David Hartley Haas, Norma V. Stephens, Camellia Zamiri
  • Patent number: 9364564
    Abstract: Provided herein are ready-to-use premixed pharmaceutical compositions of nicardipine or a pharmaceutically acceptable salt and methods for use in treating cardiovascular and cerebrovascular conditions.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: June 14, 2016
    Assignee: EKR Therapeutics, Inc.
    Inventors: Michelle Renee Duncan, Supriya Gupta, David Hartley Haas, Norma V. Stephens, Camellia Zamiri