Patents by Inventor David Hepkin

David Hepkin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12204771
    Abstract: Techniques of implementing software filtered non-volatile memory in a computing device are disclosed herein. In one embodiment, a method includes detecting an entry being written to a guest admin submission queue (gASQ) by a memory driver of a virtual machine hosted on the computing device. Upon detecting the entry written to the gASQ by the memory driver, the command in the entry is analyzed to determine whether the command is allowed based on a list of allowed or disallowed commands. In response to determining that the command in the entry is not allowed, without sending the command to the non-volatile memory, generating an execution result of the command in response to the entry being written to the gASQ by the memory driver. As such, potentially harmful commands from the memory driver are prevented from being executed by the non-volatile memory.
    Type: Grant
    Filed: February 7, 2024
    Date of Patent: January 21, 2025
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Martijn de Kort, David Hepkin, Murtaza Ghiya, Liang Yang, Matthew David Kurjanowicz
  • Publication number: 20240256151
    Abstract: Techniques of implementing software filtered non-volatile memory in a computing device are disclosed herein. In one embodiment, a method includes detecting an entry being written to a guest admin submission queue (gASQ) by a memory driver of a virtual machine hosted on the computing device. Upon detecting the entry written to the gASQ by the memory driver, the command in the entry is analyzed to determine whether the command is allowed based on a list of allowed or disallowed commands. In response to determining that the command in the entry is not allowed, without sending the command to the non-volatile memory, generating an execution result of the command in response to the entry being written to the gASQ by the memory driver. As such, potentially harmful commands from the memory driver are prevented from being executed by the non-volatile memory.
    Type: Application
    Filed: February 7, 2024
    Publication date: August 1, 2024
    Inventors: Martijn de Kort, David Hepkin, Murtaza Ghiya, Liang Yang, Matthew David Kurjanowicz
  • Patent number: 11941260
    Abstract: Techniques of implementing software filtered non-volatile memory in a computing device are disclosed herein. In one embodiment, a method includes detecting an entry being written to a guest admin submission queue (gASQ) by a memory driver of a virtual machine hosted on the computing device. Upon detecting the entry written to the gASQ by the memory driver, the command in the entry is analyzed to determine whether the command is allowed based on a list of allowed or disallowed commands. In response to determining that the command in the entry is not allowed, without sending the command to the non-volatile memory, generating an execution result of the command in response to the entry being written to the gASQ by the memory driver. As such, potentially harmful commands from the memory driver are prevented from being executed by the non-volatile memory.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: March 26, 2024
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Martijn de Kort, David Hepkin, Murtaza Ghiya, Liang Yang, Matthew David Kurjanowicz
  • Publication number: 20220413717
    Abstract: Techniques of implementing software filtered non-volatile memory in a computing device are disclosed herein. In one embodiment, a method includes detecting an entry being written to a guest admin submission queue (gASQ) by a memory driver of a virtual machine hosted on the computing device. Upon detecting the entry written to the gASQ by the memory driver, the command in the entry is analyzed to determine whether the command is allowed based on a list of allowed or disallowed commands. In response to determining that the command in the entry is not allowed, without sending the command to the non-volatile memory, generating an execution result of the command in response to the entry being written to the gASQ by the memory driver. As such, potentially harmful commands from the memory driver are prevented from being executed by the non-volatile memory.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 29, 2022
    Inventors: Martijn de Kort, David Hepkin, Murtaza Ghiya, Liang Yang, Matthew David Kurjanowicz
  • Patent number: 11385809
    Abstract: Techniques of implementing software filtered non-volatile memory in a computing device are disclosed herein. In one embodiment, a method includes detecting an entry being written to a guest admin submission queue (gASQ) by a memory driver of a virtual machine hosted on the computing device. Upon detecting the entry written to the gASQ by the memory driver, the command in the entry is analyzed to determine whether the command is allowed based on a list of allowed or disallowed commands. In response to determining that the command in the entry is not allowed, without sending the command to the non-volatile memory, generating an execution result of the command in response to the entry being written to the gASQ by the memory driver. As such, potentially harmful commands from the memory driver are prevented from being executed by the non-volatile memory.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: July 12, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Martijn de Kort, David Hepkin, Murtaza Ghiya, Liang Yang, Matthew David Kurjanowicz
  • Publication number: 20210181956
    Abstract: Techniques of implementing software filtered non-volatile memory in a computing device are disclosed herein. In one embodiment, a method includes detecting an entry being written to a guest admin submission queue (gASQ) by a memory driver of a virtual machine hosted on the computing device. Upon detecting the entry written to the gASQ by the memory driver, the command in the entry is analyzed to determine whether the command is allowed based on a list of allowed or disallowed commands. In response to determining that the command in the entry is not allowed, without sending the command to the non-volatile memory, generating an execution result of the command in response to the entry being written to the gASQ by the memory driver. As such, potentially harmful commands from the memory driver are prevented from being executed by the non-volatile memory.
    Type: Application
    Filed: March 1, 2021
    Publication date: June 17, 2021
    Inventors: Martijn de Kort, David Hepkin, Murtaza Ghiya, Liang Yang, Matthew David Kurjanowicz
  • Patent number: 10969973
    Abstract: Techniques of implementing software filtered non-volatile memory in a computing device are disclosed herein. In one embodiment, a method includes detecting an entry being written to a guest admin submission queue (gASQ) by a memory driver of a virtual machine hosted on the computing device. Upon detecting the entry written to the gASQ by the memory driver, the command in the entry is analyzed to determine whether the command is allowed based on a list of allowed or disallowed commands. In response to determining that the command in the entry is not allowed, without sending the command to the non-volatile memory, generating an execution result of the command in response to the entry being written to the gASQ by the memory driver. As such, potentially harmful commands from the memory driver are prevented from being executed by the non-volatile memory.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: April 6, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Martijn de Kort, David Hepkin, Murtaza Ghiya, Liang Yang, Matthew David Kurjanowicz
  • Patent number: 10956193
    Abstract: Moving scheduling of processor time for virtual processors (VPs) out of a virtualization hypervisor. A host operating system schedules VP (virtual processor) processor time. The host operating system creates VP backing threads, one for each VP of each virtual machine. There is a one-to-one mapping between each VP thread in the host operating system and each VP in the hypervisor. When a VP thread is dispatched for a slice of processor time, the host operating system calls into the hypervisor to have the hypervisor start executing the VP, and the hypervisor may perform a processor context switch for the VP. Of note is the security separation between VP scheduling and VP context switching. The hypervisor manages VP context switching in kernel mode while VP scheduling is performed in user mode. There is a security/interface boundary between the unit that schedules VP processor time and the hypervisor.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: March 23, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Artem Oks, David Hepkin
  • Publication number: 20200097192
    Abstract: Techniques of implementing software filtered non-volatile memory in a computing device are disclosed herein. In one embodiment, a method includes detecting an entry being written to a guest admin submission queue (gASQ) by a memory driver of a virtual machine hosted on the computing device. Upon detecting the entry written to the gASQ by the memory driver, the command in the entry is analyzed to determine whether the command is allowed based on a list of allowed or disallowed commands. In response to determining that the command in the entry is not allowed, without sending the command to the non-volatile memory, generating an execution result of the command in response to the entry being written to the gASQ by the memory driver. As such, potentially harmful commands from the memory driver are prevented from being executed by the non-volatile memory.
    Type: Application
    Filed: September 20, 2018
    Publication date: March 26, 2020
    Inventors: Martijn de Kort, David Hepkin, Murtaza Ghiya, Liang Yang, Matthew David Kurjanowicz
  • Publication number: 20180285135
    Abstract: Embodiments relate to moving scheduling of processor time for virtual processors (VPs) out of a virtualization hypervisor. In one embodiment, a host operating system schedules VP processor time. The host operating system creates VP backing threads, one for each VP of each VM. There is a one-to-one mapping between each VP thread in the host operating system and each VP in the hypervisor. When a VP thread is dispatched for a slice of processor time, the host operating system calls into the hypervisor to have the hypervisor start executing the VP, and the hypervisor may perform a processor context switch for the VP. Of note is the security separation between VP scheduling and VP context switching. The hypervisor manages VP context switching in kernel mode while VP scheduling is performed in user mode. There is a security/interface boundary between the unit that schedules VP processor time and the hypervisor.
    Type: Application
    Filed: March 31, 2017
    Publication date: October 4, 2018
    Inventors: Artem Oks, David Hepkin
  • Publication number: 20070168638
    Abstract: A method, system and computer program product for allocating real memory to virtual memory page sizes when all real memory is in use is disclosed. In response to a page fault, a page frame for a virtual page is selected. In response to determining that said page does not represent a new page, a page is paged-in into said page frame a repaging rate for a page size of the page is modified in a repaging rates data structure.
    Type: Application
    Filed: January 18, 2006
    Publication date: July 19, 2007
    Inventors: David Hepkin, Thomas Mathews
  • Publication number: 20060288187
    Abstract: A method and system for efficiently migrating in-use small pages to enable promotion of contiguous small pages into large pages in a memory environment that includes small pages pinned to real memory and/or and small pages mapped to direct memory access (DMA) within real memory. The operating system is designed with a two-phase page promotion engine/utility that enables coalescing contiguous small virtual memory pages to create large virtual memory pages by migrating in-use small memory pages including those that are pinned and/or mapped to DMA.
    Type: Application
    Filed: June 16, 2005
    Publication date: December 21, 2006
    Applicant: International Business Machines Corporation
    Inventors: Ramanjaneya Burugula, David Hepkin, Joefon Jann, Thomas Mathews
  • Publication number: 20060288186
    Abstract: A system and method for dynamically altering a Virtual Memory Manager (VMM) Sequential-Access Read Ahead settings based upon current system memory conditions is provided. Normal VMM operations are performed using the Sequential-Access Read Ahead values set by the user. When low memory is detected, the system either turns off Sequential-Access Read Ahead operations or decreases the maximum page ahead (maxpgahead) value based upon whether the amount of free space is simply low or has reached a critically low level. The altered VMM Sequential-Access Read Ahead state remains in effect until enough free space is available so that normal VMM Sequential-Access Read Ahead operations can be performed (at which point the altered Sequential-Access Read Ahead values are reset to their original levels).
    Type: Application
    Filed: August 8, 2006
    Publication date: December 21, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jos Accapadi, Andrew Dunshea, Li Li, Grover Neuman, Mysore Srinivas, David Hepkin
  • Publication number: 20060277389
    Abstract: In a data processing system utilizing multiple page sizes for virtual memory paging, a system, method, and article of manufacture for managing page replacement. In one embodiment, the page replacement method begins with a page frame allocation request, such as may be generated following a page fault. A page replacement procedure is invoked to select one or more pages to be replaced by the requested page(s). In a preferred embodiment, the page replacement includes a step of selecting, in accordance with a page type allocation of at least one of the multiple page sizes, a page size to be utilized for page replacement for the page frame allocation request.
    Type: Application
    Filed: June 6, 2005
    Publication date: December 7, 2006
    Applicant: International Business Machines Corporation
    Inventors: David Hepkin, Thomas Mathews
  • Publication number: 20060020738
    Abstract: A fork system call by a first process is detected. A second process is created as a replication of the first process with a second affinity. If a replication of the replicated shared library is present in the second affinity domain, effective addresses of the replication of the replicated shared library are mapped using a mapping mechanism of the present invention to physical addresses in the second affinity domain.
    Type: Application
    Filed: July 22, 2004
    Publication date: January 26, 2006
    Applicant: International Business Machines Corporation
    Inventors: David Hepkin, Bret Olszewski
  • Publication number: 20050268052
    Abstract: A system and method for improving dynamic memory removals by reducing the file cache size prior to the dynamic memory removal operation initiating are provided. In one exemplary embodiment, the maximum amount of physical memory that can be used to cache files is reduced prior to performing a dynamic memory removal operation. Reducing the maximum amount of physical memory that can be used to cache files causes the page replacement algorithm to aggressively target file pages to bring the size of the file cache below the new maximum limit on the file cache size. This results in more file pages, rather than working storage pages, being paged-out.
    Type: Application
    Filed: May 27, 2004
    Publication date: December 1, 2005
    Applicant: International Business Machines Corporation
    Inventors: David Hepkin, Bret Olszewski
  • Publication number: 20050235125
    Abstract: A system and method for dynamically altering a Virtual Memory Manager (VMM) Sequential-Access Read Ahead settings based upon current system memory conditions is provided. Normal VMM operations are performed using the Sequential-Access Read Ahead values set by the user. When low memory is detected, the system either turns off Sequential-Access Read Ahead operations or decreases the maximum page ahead (maxpgahead) value based upon whether the amount of free space is simply low or has reached a critically low level. The altered VMM Sequential-Access Read Ahead state remains in effect until enough free space is available so that normal VMM Sequential-Access Read Ahead operations can be performed (at which point the altered Sequential-Access Read Ahead values are reset to their original levels).
    Type: Application
    Filed: April 20, 2004
    Publication date: October 20, 2005
    Applicant: International Business Machines Corporation
    Inventors: Jos Accapadi, Andrew Dunshea, Li Li, Grover Neuman, Mysore Srinivas, David Hepkin
  • Publication number: 20050097294
    Abstract: A method, an apparatus, and a computer program product are presented for memory page initialization operations. After an application thread attempts to reference a memory page, an exception or fault may be generated, and a physical memory page is allocated. The application thread is put to sleep, and a page initialization request is given to a kernel off-level worker thread, after which the interrupt-level processing is concluded. During the normal course of execution for the worker thread, the worker thread recognizes the page initialization request, and the worker thread initializes the newly allocated page by zeroing the page or by copying the contents of a source page to the newly allocated page, as appropriate. The worker thread then puts the application thread into a runnable state.
    Type: Application
    Filed: October 30, 2003
    Publication date: May 5, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: David Hepkin