Patents by Inventor David Howard Allen
David Howard Allen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240141867Abstract: The present disclosure relates to and envisages a jetstream power generating system. Producing electric power from jetstream force presents specific, daunting, physics-based challenges, because jetstream forces are 30 to 50 times stronger than wind on the ground. The system is configured to harness the energy of these jetstream forces in farms as power generating infrastructure. The system comprises an airborne element configured to be subjected to lift forces while flying in a jetstream, a capstan drum, a tether coupled between the airborne element and the capstan drum, an arcuate guide track, a kite tracker displaceably mounted on the guide track, a conversion unit coupled to the capstan drum, a plurality of accumulators configured to fluidly communicate with the conversion unit, and a generator.Type: ApplicationFiled: October 24, 2023Publication date: May 2, 2024Inventors: Gregory Howard Hastings, David John Hartshorne, John Ross Allen, Dale Richard Gluck
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Patent number: 8515590Abstract: Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. A method is provided for controlling the speed of a cooling fan provided to cool an integrated circuit in which includes the steps of receiving a voltage from a thermal diode, addressing a table of digital temperatures by incrementing the address of the table entries every clock cycle of a circuit clock, converting the addressed data to a second voltage representing temperature, comparing the first voltage to the second voltage, providing a resulting temperature when both the first and second voltages are equal, and adjusting the fan speed accordingly.Type: GrantFiled: April 17, 2012Date of Patent: August 20, 2013Assignee: International Business Machines CorporationInventors: Deepak K. Singh, Francois Ibrahim Atallah, David Howard Allen
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Publication number: 20120203394Abstract: Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. A method is provided for controlling the speed of a cooling fan provided to cool an integrated circuit in which includes the steps of receiving a voltage from a thermal diode, addressing a table of digital temperatures by incrementing the address of the table entries every clock cycle of a circuit clock, converting the addressed data to a second voltage representing temperature, comparing the first voltage to the second voltage, providing a resulting temperature when both the first and second voltages are equal, and adjusting the fan speed accordingly.Type: ApplicationFiled: April 17, 2012Publication date: August 9, 2012Inventors: Deepak Singh, Francois Ibrahim Atallah, David Howard Allen
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Patent number: 8219261Abstract: Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. A method is provided for controlling the speed of a cooling fan provided to cool an integrated circuit in which includes the steps of receiving a voltage from a thermal diode, addressing a table of digital temperatures by incrementing the address of the table entries every clock cycle of a circuit clock, converting the addressed data to a second voltage representing temperature, comparing the first voltage to the second voltage, providing a resulting temperature when both the first and second voltages are equal, and adjusting the fan speed accordingly.Type: GrantFiled: September 13, 2010Date of Patent: July 10, 2012Assignee: International Business Machines CorporationInventors: Deepak K. Singh, Francois Ibrahim Atallah, David Howard Allen
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Patent number: 8138054Abstract: An enhanced FET capable of controlling current above and below a gate of the FET. The FET is formed on a semiconductor substrate. A source and drain are formed in the substrate (or in a well in the substrate). A first epitaxial layer of similar doping to the source and drain are grown on the source and drain, the first epitaxial layer is thicker than the gate, but not so thick as to cover the top of the gate. A second epitaxial layer of opposite doping is grown on the first epitaxial layer thick enough to cover the top of the gate. The portion of the second epitaxial layer above the gate serves as a body through which the gate controls current flow between portions of the first epitaxial layer over the drain and the source.Type: GrantFiled: April 1, 2009Date of Patent: March 20, 2012Assignee: International Business Machines CorporationInventors: David Howard Allen, Todd Alan Christensen, David Paul Paulsen, John Edward Sheets, II
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Patent number: 7865750Abstract: Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. A method is provided for controlling the speed of a cooling fan provided to cool an integrated circuit in which includes the steps of receiving a voltage from a thermal diode, addressing a table of digital temperatures by incrementing the address of the table entries every clock cycle of a circuit clock, converting the addressed data to a second voltage representing temperature, comparing the first voltage to the second voltage, providing a resulting temperature when both the first and second voltages are equal, and adjusting the fan speed accordingly.Type: GrantFiled: February 6, 2007Date of Patent: January 4, 2011Assignee: International Business Machines CorporationInventors: Deepak K. Singh, Francois Ibrahim Atallah, David Howard Allen
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Publication number: 20100332875Abstract: Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. A method is provided for controlling the speed of a cooling fan provided to cool an integrated circuit in which includes the steps of receiving a voltage from a thermal diode, addressing a table of digital temperatures by incrementing the address of the table entries every clock cycle of a circuit clock, converting the addressed data to a second voltage representing temperature, comparing the first voltage to the second voltage, providing a resulting temperature when both the first and second voltages are equal, and adjusting the fan speed accordingly.Type: ApplicationFiled: September 13, 2010Publication date: December 30, 2010Inventors: Deepak K. Singh, Francois Ibrahim Atallah, David Howard Allen
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Publication number: 20100252868Abstract: An enhanced FET capable of controlling current above and below a gate of the FET. The FET is formed on a semiconductor substrate. A source and drain are formed in the substrate (or in a well in the substrate). A first epitaxial layer of similar doping to the source and drain are grown on the source and drain, the first epitaxial layer is thicker than the gate, but not so thick as to cover the top of the gate. A second epitaxial layer of opposite doping is grown on the first epitaxial layer thick enough to cover the top of the gate. The portion of the second epitaxial layer above the gate serves as a body through which the gate controls current flow between portions of the first epitaxial layer over the drain and the source.Type: ApplicationFiled: April 1, 2009Publication date: October 7, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David Howard Allen, Todd Alan Christensen, David Paul Paulsen, John Edward Sheets, II
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Patent number: 7733722Abstract: Apparatus implements effective testing of a sense amplifier for an eFuse without having to program or blow the eFuse. After initial processing of the sense amplifier, testing determines whether the sense amplifier can generate a valid “0” and “1” before programming the eFuse. A first precharge device and a second precharge device that normally respectively precharge a true sense node and a complement sense node to a high voltage are driven separately. For testing, one of the precharge devices is conditionally held off to insure the sense amplifier results in a “0” and “1”. This allows the testing of the sense amplifier devices as well as down stream connected devices. Once testing is complete, both precharge devices are controlled in tandem.Type: GrantFiled: January 12, 2009Date of Patent: June 8, 2010Assignee: International Business Machines CorporationInventors: Anthony Gus Aipperspach, David Howard Allen, Louis Bernard Bushard, Phil Christopher Felice Paone, Gregory John Uhlmann
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Patent number: 7689950Abstract: A method and apparatus implement effective testing of a sense amplifier for an eFuse without having to program or blow the eFuse, and a design structure on which the subject circuit resides is provided. After initial processing of the sense amplifier, testing determines whether the sense amplifier can generate a valid “0” and “1” before programming the eFuse. A first precharge device and a second precharge device that normally respectively precharge a true sense node and a complement sense node to a high voltage are driven separately. For testing, one of the precharge devices is conditionally held off to insure the sense amplifier results in a “0” and “1”. This allows the testing of the sense amplifier devices as well as down stream connected devices. Once testing is complete, both precharge devices are controlled in tandem.Type: GrantFiled: October 16, 2007Date of Patent: March 30, 2010Assignee: International Business Machines CorporationInventors: Anthony Gus Aipperspach, David Howard Allen, Louis Bernard Bushard, Phil Christopher Felice Paone, Gregory John Uhlmann
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Publication number: 20090175106Abstract: Apparatus implements effective testing of a sense amplifier for an eFuse without having to program or blow the eFuse. After initial processing of the sense amplifier, testing determines whether the sense amplifier can generate a valid “0” and “1” before programming the eFuse. A first precharge device and a second precharge device that normally respectively precharge a true sense node and a complement sense node to a high voltage are driven separately. For testing, one of the precharge devices is conditionally held off to insure the sense amplifier results in a “0” and “1”. This allows the testing of the sense amplifier devices as well as down stream connected devices. Once testing is complete, both precharge devices are controlled in tandem.Type: ApplicationFiled: January 12, 2009Publication date: July 9, 2009Applicant: International Business Machines CorporationInventors: Anthony Gus Aipperspach, David Howard Allen, Louis Bernard Bushard, Phil Christopher Felice Paone, Gregory John Uhlmann
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Patent number: 7532057Abstract: A design structure for electrically programmable fuse sense circuit having an electrically programmable fuse and a reference resistance. A first current source is coupled, through a first switch, to the electrically programmable fuse. A second current source is coupled, through a second switch, to the reference resistance. A precharge signal enables the first current source, the second current source and closes the first switch and the second switch, creating voltage drops across the electrically programmable fuse and the reference resistance. When the precharge signal goes inactive, the first current source and the second current source are shut off, and, at the same time the first switch and the second switch are opened. A latching circuit uses a difference in the voltage drops when the precharge signal goes inactive to store a state of the electrically programmable fuse, indicative of whether the electrically programmable fuse is blown or unblown.Type: GrantFiled: October 16, 2007Date of Patent: May 12, 2009Assignee: International Business Machines CorporationInventors: Anthony Gus Aipperspach, David Howard Allen, Phil C. Paone, David Edward Schmitt, Gregory John Uhlmann
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Patent number: 7528646Abstract: A electrically programmable fuse sense circuit having an electrically programmable fuse and a reference resistance. A first current source is coupled, through a first switch, to the electrically programmable fuse. A second current source is coupled, through a second switch, to the reference resistance. A precharge signal enables the first current source, the second current source and closes the first switch and the second switch, creating voltage drops across the electrically programmable fuse and the reference resistance. When the precharge signal goes inactive, the first current source and the second current source are shut off, and, at the same time the first switch and the second switch are opened. A latching circuit uses a difference in the voltage drops when the precharge signal goes inactive to store a state of the electrically programmable fuse, indicative of whether the electrically programmable fuse is blown or unblown.Type: GrantFiled: October 19, 2006Date of Patent: May 5, 2009Assignee: International Business Machines CorporationInventors: Anthony Gus Aipperspach, David Howard Allen, Phil Paone, David Edward Schmitt, Gregory John Uhlmann
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Patent number: 7489572Abstract: A method implements effective testing of a sense amplifier for an eFuse without having to program or blow the eFuse. After initial processing of the sense amplifier, testing determines whether the sense amplifier can generate a valid “0” and “1” before programming the eFuse. A first precharge device and a second precharge device that normally respectively precharge a true sense node and a complement sense node to a high voltage are driven separately. For testing, one of the precharge devices is conditionally held off to insure the sense amplifier results in a “0” and “1”. This allows the testing of the sense amplifier devices as well as down stream connected devices. Once testing is complete, both precharge devices are controlled in tandem.Type: GrantFiled: January 12, 2007Date of Patent: February 10, 2009Assignee: International Business Machines CorporationInventors: Anthony Gus Aipperspach, David Howard Allen, Louis Bernard Bushard, Phil Christopher Felice Paone, Gregory John Uhlmann
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Publication number: 20080188994Abstract: Measurement circuit components are included in an integrated circuit fabricated on a semiconductor substrate. A method is provided for controlling the speed of a cooling fan provided to cool an integrated circuit in which includes the steps of receiving a voltage from a thermal diode, addressing a table of digital temperatures by incrementing the address of the table entries every clock cycle of a circuit clock, converting the addressed data to a second voltage representing temperature, comparing the first voltage to the second voltage, providing a resulting temperature when both the first and second voltages are equal, and adjusting the fan speed accordingly.Type: ApplicationFiled: February 6, 2007Publication date: August 7, 2008Inventors: Deepak K. Singh, Francois Ibrahim Atallah, David Howard Allen
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Publication number: 20080169843Abstract: A method and apparatus implement effective testing of a sense amplifier for an eFuse without having to program or blow the eFuse, and a design structure on which the subject circuit resides is provided. After initial processing of the sense amplifier, testing determines whether the sense amplifier can generate a valid “0” and “1” before programming the eFuse. A first precharge device and a second precharge device that normally respectively precharge a true sense node and a complement sense node to a high voltage are driven separately. For testing, one of the precharge devices is conditionally held off to insure the sense amplifier results in a “0” and “1”. This allows the testing of the sense amplifier devices as well as down stream connected devices. Once testing is complete, both precharge devices are controlled in tandem.Type: ApplicationFiled: October 16, 2007Publication date: July 17, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Anthony Gus Aipperspach, David Howard Allen, Louis Bernard Bushard, Phil Christopher Felice Paone, Gregory John Uhlmann
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Publication number: 20080170449Abstract: A method and apparatus implement effective testing of a sense amplifier for an eFuse without having to program or blow the eFuse. After initial processing of the sense amplifier, testing determines whether the sense amplifier can generate a valid “0” and “1” before programming the eFuse. A first precharge device and a second precharge device that normally respectively precharge a true sense node and a complement sense node to a high voltage are driven separately. For testing, one of the precharge devices is conditionally held off to insure the sense amplifier results in a “0” and “1”. This allows the testing of the sense amplifier devices as well as down stream connected devices. Once testing is complete, both precharge devices are controlled in tandem.Type: ApplicationFiled: January 12, 2007Publication date: July 17, 2008Inventors: Anthony Gus Aipperspach, David Howard Allen, Louis Bernard Bushard, Phil Christopher Felice Paone, Gregory John Uhlmann
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Publication number: 20080157851Abstract: A design structure for electrically programmable fuse sense circuit having an electrically programmable fuse and a reference resistance. A first current source is coupled, through a first switch, to the electrically programmable fuse. A second current source is coupled, through a second switch, to the reference resistance. A precharge signal enables the first current source, the second current source and closes the first switch and the second switch, creating voltage drops across the electrically programmable fuse and the reference resistance. When the precharge signal goes inactive, the first current source and the second current source are shut off, and, at the same time the first switch and the second switch are opened. A latching circuit uses a difference in the voltage drops when the precharge signal goes inactive to store a state of the electrically programmable fuse, indicative of whether the electrically programmable fuse is blown or unblown.Type: ApplicationFiled: October 16, 2007Publication date: July 3, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Anthony Gus Aipperspach, David Howard Allen, Phil C. Paone, David Edward Schmitt, Gregory John Uhlmann
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Publication number: 20080106323Abstract: A electrically programmable fuse sense circuit having an electrically programmable fuse and a reference resistance. A first current source is coupled, through a first switch, to the electrically programmable fuse. A second current source is coupled, through a second switch, to the reference resistance. A precharge signal enables the first current source, the second current source and closes the first switch and the second switch, creating voltage drops across the electrically programmable fuse and the reference resistance. When the precharge signal goes inactive, the first current source and the second current source are shut off, and, at the same time the first switch and the second switch are opened. A latching circuit uses a difference in the voltage drops when the precharge signal goes inactive to store a state of the electrically programmable fuse, indicative of whether the electrically programmable fuse is blown or unblown.Type: ApplicationFiled: October 19, 2006Publication date: May 8, 2008Inventors: Anthony Gus Aipperspach, David Howard Allen, Phil Paone, David Edward Schmitt, Gregory John Uhlmann
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Patent number: 7337340Abstract: A system and method of compensating for effects of on-chip processing variation on an integrated circuit. The integrated circuit is divided into a set of regions. Then, a region control logic, included in each region, predicts a processing variation in each respective region of the integrated circuit. Finally, each region control logic automatically selects one of a set of available power settings to power each one of the respective regions, in response to the region control logic predicting the processing variation, wherein the processing variation of each of the set of regions is minimized.Type: GrantFiled: March 17, 2005Date of Patent: February 26, 2008Assignee: International Business Machines CorporationInventor: David Howard Allen