Patents by Inventor David I. Anderson
David I. Anderson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11356087Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.Type: GrantFiled: February 11, 2021Date of Patent: June 7, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Michael Douglas Seeman, Sandeep R. Bahl, David I. Anderson
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Publication number: 20210167767Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.Type: ApplicationFiled: February 11, 2021Publication date: June 3, 2021Inventors: Michael Douglas Seeman, Sandeep R. Bahl, David I. Anderson
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Patent number: 10903753Abstract: A converter circuit includes a primary side having a resonator and a first control circuit configured to control the resonator. The converter circuit also includes a secondary side having a resonant rectifier and a second control circuit configured to control the resonant rectifier. The converter circuit further includes a transformer configured to electrically isolate the primary side from the secondary side. The second control circuit is configured to turn the resonant rectifier on and off. The first control circuit may be configured to detect when the resonant rectifier is off and, in response, turn the resonator off without using a feedback signal from the secondary side. The first control circuit may be configured to detect when the resonant rectifier is off by detecting when input power to the primary side decreases. The resonant rectifier could be turned on and off by detuning the resonant rectifier.Type: GrantFiled: March 29, 2011Date of Patent: January 26, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Giovanni Frattini, Roberto G. Massolini, Maurizio Granato, David I. Anderson
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Publication number: 20180006640Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.Type: ApplicationFiled: September 12, 2017Publication date: January 4, 2018Inventors: Michael Douglas Seeman, Sandeep R. Bahl, David I. Anderson
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Patent number: 9762230Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.Type: GrantFiled: November 17, 2014Date of Patent: September 12, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Michael Douglas Seeman, Sandeep R. Bahl, David I. Anderson
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Publication number: 20150137619Abstract: In described examples, a first transistor has: a drain coupled to a source of a depletion-mode transistor; a source coupled to a first voltage node; and a gate coupled to a control node. A second transistor has: a drain coupled to a gate of the depletion-mode transistor; a source coupled to the first voltage node; and a gate coupled through at least one first logic device to an input node. A third transistor has: a drain coupled to the gate of the depletion-mode transistor; a source coupled to a second voltage node; and a gate coupled through at least one second logic device to the input node.Type: ApplicationFiled: November 17, 2014Publication date: May 21, 2015Inventors: Michael Douglas Seeman, Sandeep R. Bahl, David I. Anderson
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Publication number: 20140374766Abstract: A semiconductor device includes a bidirectional GaN FET formed on a non-insulating substrate. The semiconductor device further includes a first electrical clamp connected between the substrate and a first source/drain node of the bidirectional GaN FET, and a second electrical clamp connected between the substrate and a second source/drain node of the bidirectional GaN FET. The first clamp and the second clamp are configured to bias the substrate at a lower voltage level of an applied bias to the first source/drain node and an applied bias to the second source/drain node, within an offset voltage of the relevant clamp.Type: ApplicationFiled: June 20, 2013Publication date: December 25, 2014Inventors: Sandeep R. BAHL, Matthew SENESKY, Naveen TIPIRNENI, David I. ANDERSON, Sameer PENDHARKAR
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Patent number: 8749995Abstract: A gate driving circuit includes a driving stage configured to receive an input signal and generate a gate drive signal for a gate of a transistor switch. The gate driving circuit also includes an LC circuit having an inductor and a gate capacitance of the transistor switch. The LC circuit is configured so that a pulse in the gate drive signal generates a ringing in the LC circuit at a resonance frequency of the LC circuit to transfer energy into and out of the gate capacitance of the transistor switch. A switch could selectively couple the gate of the transistor switch to ground in order to discharge the gate capacitance. A control circuit could be used to provide the input signal, and the control circuit could be configured to regulate a duty cycle of the gate drive signal by adjusting an off-time between consecutive pulses in the input signal.Type: GrantFiled: March 29, 2011Date of Patent: June 10, 2014Assignee: Texas Instruments IncorporatedInventors: Giovanni Frattini, Roberto G. Massolini, Maurizio Granato, David I. Anderson
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Publication number: 20120250382Abstract: A converter circuit includes a primary side having a resonator and a first control circuit configured to control the resonator. The converter circuit also includes a secondary side having a resonant rectifier and a second control circuit configured to control the resonant rectifier. The converter circuit further includes a transformer configured to electrically isolate the primary side from the secondary side. The second control circuit is configured to turn the resonant rectifier on and off. The first control circuit may be configured to detect when the resonant rectifier is off and, in response, turn the resonator off without using a feedback signal from the secondary side. The first control circuit may be configured to detect when the resonant rectifier is off by detecting when input power to the primary side decreases. The resonant rectifier could be turned on and off by detuning the resonant rectifier.Type: ApplicationFiled: March 29, 2011Publication date: October 4, 2012Applicant: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Giovanni Frattini, Roberto G. Massolini, Maurizio Granato, David I. Anderson
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Publication number: 20120249189Abstract: A gate driving circuit includes a driving stage configured to receive an input signal and generate a gate drive signal for a gate of a transistor switch. The gate driving circuit also includes an LC circuit having an inductor and a gate capacitance of the transistor switch. The LC circuit is configured so that a pulse in the gate drive signal generates a ringing in the LC circuit at a resonance frequency of the LC circuit to transfer energy into and out of the gate capacitance of the transistor switch. A switch could selectively couple the gate of the transistor switch to ground in order to discharge the gate capacitance. A control circuit could be used to provide the input signal, and the control circuit could be configured to regulate a duty cycle of the gate drive signal by adjusting an off-time between consecutive pulses in the input signal.Type: ApplicationFiled: March 29, 2011Publication date: October 4, 2012Applicant: NATIONAL SEMICONDUCTOR CORPORATIONInventors: Giovanni Frattini, Roberto G. Massolini, Maurizia Granato, David I. Anderson
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Publication number: 20120002377Abstract: An integrated circuit die system comprises a first integrated circuit die, a second integrated circuit die and a transformer formed on a dielectric (e.g., quartz) substrate and electrically connected between the first integrated circuit die and the second integrated circuit die to provide galvanic isolation therebetween.Type: ApplicationFiled: June 30, 2010Publication date: January 5, 2012Inventors: William French, Peter J. Hopper, Peter Smeys, Ann Gabrys, David I. Anderson
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Patent number: 8022746Abstract: The invention relates to an apparatus and method for driving high-side switching devices in an H-Bridge circuit. The apparatus includes first and second N-Channel high-side switching devices. Each of the high-side switching devices is associated with, and is selectively driven by, a driver circuit. Each of the driver circuits is associated with, and is powered from, a bootstrap capacitor. The apparatus further includes a cross-couple circuit that is arranged to charge each of the bootstrap capacitors based, at least in part, on whether the low-side switching device that is associated with the other bootstrap capacitor is open or closed.Type: GrantFiled: February 7, 2008Date of Patent: September 20, 2011Assignee: National Semiconductor CorporationInventors: Barry Signoretti, David I. Anderson, Jianhui Zhang
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Patent number: 7821244Abstract: A circuit for voltage regulation is provided. The circuit includes a variable output voltage regulator and an output capacitor circuit. The output capacitor circuit includes at least two output capacitors and at least one switch. The variable output voltage regulator is capable of providing a regulated DC output voltage at two or more different voltage levels. When the output voltage is changed to a lower output voltage level, one of the output capacitors in the output capacitor circuit is switched out of the circuit to conserve the charge stored on it. When the output voltage returns to the higher output voltage level, the output capacitor that was switched out is switched back in.Type: GrantFiled: July 31, 2008Date of Patent: October 26, 2010Assignee: National Semiconductor CorporationInventors: Barry Signoretti, Jianhui Zhang, David I. Anderson
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Patent number: D560221Type: GrantFiled: July 28, 2006Date of Patent: January 22, 2008Assignee: Omnimount Systems, Inc.Inventors: Korry Hoglan, Zachary Eyman, Brett Stenhouse, David I. Anderson
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Patent number: D802042Type: GrantFiled: October 14, 2015Date of Patent: November 7, 2017Assignee: AXON ENTERPRISE, INC.Inventors: Anne F. Peabody, David I. Anderson, Christopher M. Buttenob, John W. Wilson
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Patent number: D803294Type: GrantFiled: May 20, 2016Date of Patent: November 21, 2017Assignee: TASER INTERNATIONAL, INC.Inventors: Anne F. Peabody, David I. Anderson, Christopher M. Buttenob, John W. Wilson
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Patent number: D805575Type: GrantFiled: May 20, 2016Date of Patent: December 19, 2017Assignee: TASER INTERNATIONAL, INC.Inventors: Anne F. Peabody, David I. Anderson, Christopher M. Buttenob, John W. Wilson