Abstract: A method and circuit for implementing differential resonant clocking with a DC blocking capacitor, and a design structure on which the subject circuit resides are provided. An on-chip inductor and an on-chip capacitor are connected between a pair of differential active clock load nodes to form a resonant tank circuit. The on-chip inductor has a selected value based upon a value of a load capacitor of the differential active clock load nodes to determine the resonant frequency. The on-chip capacitor has a selected value substantially greater than the value of the load capacitor.

Abstract: A method and circuit for implementing differential resonant clocking with a DC blocking capacitor, and a design structure on which the subject circuit resides are provided. An on-chip inductor and an on-chip capacitor are connected between a pair of differential active clock load nodes to form a resonant tank circuit. The on-chip inductor has a selected value based upon a value of a load capacitor of the differential active clock load nodes to determine the resonant frequency. The on-chip capacitor has a selected value substantially greater than the value of the load capacitor.

Abstract: The present invention provides a differentially driven monolithic inductor circuit having a shield differentially driven by phase shift buffers and a single-ended monolithic inductor circuit having single-ended shields driven by phase shift buffers, both inductor circuit types providing high Quality factor (Q) at operating frequencies in the multi-GHz range and circuits incorporating the same.