Abstract: Mitigating Pointer Authentication Code (PAC) attacks in processor-based devices is disclosed herein. In this regard, in some exemplary aspects, a processor of a processor-based device is configured to determine that a pointer authentication instruction to authenticate a pointer is being executed speculatively. The processor is further configured to, responsive to determining that the pointer authentication instruction is being executed speculatively, determine, based on a signature of the pointer, that the pointer is not valid. The processor is also configured to, responsive to determining that the pointer is not valid, perform a mitigation action.

Abstract: A method includes determining, by a congestion point (CP) unit, traffic flow congestion in an Open Flow environment network. The CP unit comprises an Open Flow switch including a device including logic where an action is associated with each flow entry in the device. A congestion point (CP) unit sends a first congestion notification message (CNM) directly to at least one controller and sends a second CNM directly to at least one reaction point (RP) unit. The CP unit communicates with the at least one controller through a secure channel via Open Flow protocol.

Abstract: In one embodiment, a switch includes a processor and logic integrated with and/or executable by the processor to receive details about which link aggregation (LAG) information about a first peer switch will be exchanged with the switch, send to the first peer switch, prior to receiving the LAG information about the first peer switch, details about which LAG information about the switch will be exchanged with the first peer switch, receive the LAG information about the first peer switch, store the LAG information about the first peer switch, and use the LAG information about the first peer switch and the LAG information about the switch to determine load balancing across one or more connections between the switch and the first peer switch.

Abstract: According to one embodiment, a method includes performing functionality of a management plane and a control plane for a switch system using a processor of an external host coupled to the switch system via one or more peripheral component interconnect express (PCIe) ports. The method also includes providing a direct memory access (DMA) facility between the external host and switching logic of the switch system. The switch system includes a PCIe interface block coupled to PCIe ports configured to couple to external PCIe devices. Also, the PCIe interface block includes logic configured to provide DMA for each PCIe lane thereof. The switch system also includes multiple switched Ethernet ports configured to couple to one or more external Ethernet devices and switching logic configured to switch between the multiple switched Ethernet ports and the PCIe ports using DMA and a local processor coupled to the PCIe interface block.

Abstract: A method includes determining, by a congestion point (CP) unit, traffic flow congestion in an Open Flow environment network. The CP unit comprises an Open Flow switch including a device including logic where an action is associated with each flow entry in the device. A congestion point (CP) unit sends a first congestion notification message (CNM) directly to at least one controller and sends a second CNM directly to at least one reaction point (RP) unit. The CP unit communicates with the at least one controller through a secure channel via Open Flow protocol.

Abstract: Embodiments of the invention relate to providing quantized congestion notification (QCN) in networks. One embodiment includes a method that includes determining a traffic flow congestion by a particular congestion point (CP) unit of multiple CP units that communicate with at least one end unit, at least one reaction point (RP) unit and at least one controller in a network. A first congestion notification message (CNM) and a second CNM are generated by the particular CP unit. The particular CP unit sends the first CNM directly to the controller and the second CNM directly to the RP unit. Traffic flow is managed among the multiple CP units by the controller based on the first CNM.

Abstract: According to one embodiment, a method includes performing functionality of a management plane and a control plane for a switch system using a processor of an external host coupled to the switch system via one or more peripheral component interconnect express (PCIe) ports. The method also includes providing a direct memory access (DMA) facility between the external host and switching logic of the switch system. The switch system includes a PCIe interface block coupled to PCIe ports configured to couple to external PCIe devices. Also, the PCIe interface block includes logic configured to provide DMA for each PCIe lane thereof. The switch system also includes multiple switched Ethernet ports configured to couple to one or more external Ethernet devices and switching logic configured to switch between the multiple switched Ethernet ports and the PCIe ports using DMA and a local processor coupled to the PCIe interface block.

Abstract: According to one embodiment, a switch system includes an external host connected via a peripheral component interconnect express (PCIe) port to a switch system, the external host being configured to perform functionality of a management plane and a control plane for the switch system, the external host having a processor. In another embodiment, a computer program product includes a computer readable storage medium having computer readable program code embodied therewith, the computer readable program code including computer readable program code configured to perform functionality of a management plane and a control plane for a switch system using a processor of an external host. Other systems, computer program products, and methods are described according to more embodiments.

Abstract: In one embodiment, a switch includes a processor and logic integrated with and/or executable by the processor to receive details about which link aggregation (LAG) information about a first peer switch will be exchanged with the switch, send to the first peer switch, prior to receiving the LAG information about the first peer switch, details about which LAG information about the switch will be exchanged with the first peer switch, receive the LAG information about the first peer switch, store the LAG information about the first peer switch, and use the LAG information about the first peer switch and the LAG information about the switch to determine load balancing across one or more connections between the switch and the first peer switch.

Abstract: In one embodiment, a switch includes a processor adapted for executing logic, logic adapted for receiving link aggregation (LAG) information about a first peer switch, logic adapted for storing the LAG information about the first peer switch, and logic adapted for using the LAG information about the first peer switch and LAG information about the switch to determine load balancing across one or more connections between the switch and the first peer switch. In another embodiment, a method for exchanging LAG information between peer switches includes receiving LAG information about a first peer switch at a second peer switch, storing the LAG information about the first peer switch, and using the LAG information about the first peer switch and LAG information about the second peer switch to determine load balancing across one or more connections between the first and second peer switches.

Abstract: Embodiments of the invention relate to providing quantized congestion notification (QCN) in networks. One embodiment includes a method that includes determining a traffic flow congestion by a particular congestion point (CP) unit of multiple CP units that communicate with at least one end unit, at least one reaction point (RP) unit and at least one controller in a network. A first congestion notification message (CNM) and a second CNM are generated by the particular CP unit. The particular CP unit sends the first CNM directly to the controller and the second CNM directly to the RP unit. Traffic flow is managed among the multiple CP units by the controller based on the first CNM.

Abstract: According to one embodiment, a switch system includes an external host connected via a peripheral component interconnect express (PCIe) port to a switch system, the external host being configured to perform functionality of a management plane and a control plane for the switch system, the external host having a processor. In another embodiment, a computer program product includes a computer readable storage medium having computer readable program code embodied therewith, the computer readable program code including computer readable program code configured to perform functionality of a management plane and a control plane for a switch system using a processor of an external host. Other systems, computer program products, and methods are described according to more embodiments.

Abstract: According to one embodiment, a switch system includes a peripheral component interconnect express (PCIe) interface block coupled to a plurality of PCIe ports, the plurality of PCIe ports being adapted for coupling to one or more external PCIe devices, wherein the PCIe interface block includes logic adapted for providing direct memory access (DMA) for each PCIe lane thereof, multiple switched Ethernet ports adapted for coupling to one or more external Ethernet devices, switching logic adapted for switching between the multiple switched Ethernet ports and the plurality of PCIe ports, and a local processor coupled to the PCIe interface block. The external host includes a pass-through PCIe adaptor coupled to the switch system via a PCIe port. Other systems, computer program products, and methods are described according to more embodiments.

Abstract: Port mirroring in a clustered network may be performed between a local switch and a remote switch. A port in the remote switch may be designated a mirrored port where data traffic passing there through can be copied and sent to a mirror-to-port on the local switch. In a virtual local area network (VLAN) environment, data frames of the copied traffic may include a VLAN header identifying the local switch so that routing of the data frames through the network may direct the data frames for monitoring at the local switch.

Abstract: Port mirroring in a clustered network may be performed between a local switch and a remote switch. A port in the remote switch may be designated a mirrored port where data traffic passing there through can be copied and sent to a mirror-to-port on the local switch. In a virtual local area network (VLAN) environment, data frames of the copied traffic may include a VLAN header identifying the local switch so that routing of the data frames through the network may direct the data frames for monitoring at the local switch.

Abstract: According to one embodiment, a switch system includes a peripheral component interconnect express (PCIe) interface block coupled to a plurality of PCIe ports, the plurality of PCIe ports being adapted for coupling to one or more external PCIe devices, wherein the PCIe interface block includes logic adapted for providing direct memory access (DMA) for each PCIe lane thereof, multiple switched Ethernet ports adapted for coupling to one or more external Ethernet devices, switching logic adapted for switching between the multiple switched Ethernet ports and the plurality of PCIe ports, and a local processor coupled to the PCIe interface block. The external host includes a pass-through PCIe adaptor coupled to the switch system via a PCIe port. Other systems, computer program products, and methods are described according to more embodiments.