Patents by Inventor David Ingall
David Ingall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10213812Abstract: A method to remove a contaminant from a material comprises using a drive mechanism to provide a plurality of portions of material to a nozzle in order to generate a jet of the portions of material from the nozzle. At least some of the portions of material are at least partially coated in a contaminant. The jet of the portions of material are directed at a surface of a volume of liquid. An interaction between the jet of the portions of material and the surface of the volume of liquid causes at least some of the contaminant to detach from at least some of the portions of material.Type: GrantFiled: April 29, 2016Date of Patent: February 26, 2019Assignee: Transition Solutions LimitedInventors: Steve Thompson, David Ingall
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Publication number: 20180117638Abstract: A method to remove a contaminant from a material comprises using a drive mechanism to provide a plurality of portions of material to a nozzle in order to generate a jet of the portions of material from the nozzle. At least some of the portions of material are at least partially coated in a contaminant. The jet of the portions of material are directed at a surface of a volume of liquid. An interaction between the jet of the portions of material and the surface of the volume of liquid causes at least some of the contaminant to detach from at least some of the portions of material.Type: ApplicationFiled: April 29, 2016Publication date: May 3, 2018Inventors: Steve THOMPSON, David INGALL
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Patent number: 9747996Abstract: A method of improving radiation tolerance of floating gate memories is provided herein. Floating gate memories can include a floating gate transistor or a block of floating gate transistors. A floating gate transistor can include a semiconductor region, a source region, a drain region, a floating gate region, a tunnel oxide region, an oxide-nitride-oxide region, and a control gate region. A floating gate transistor or block of floating gate transistors can be written to multiple times in order to accumulate charge on one or more floating gate regions in accordance with an embodiment of the invention. When exposed to radiation, a floating gate region can retain its charge above a certain voltage threshold. A block of floating gate transistors can communicate with an external device where the external device can read a state of the block of floating gate transistors in accordance with an embodiment of the invention.Type: GrantFiled: January 27, 2017Date of Patent: August 29, 2017Assignee: The United States of America as represented by the Secretary of the NavyInventors: Matthew Kay, James David Ingalls, Matthew Gadlage, Adam Duncan, Andrew Howard
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Publication number: 20170140832Abstract: A method of improving radiation tolerance of floating gate memories is provided herein. Floating gate memories can include a floating gate transistor or a block of floating gate transistors. A floating gate transistor can include a semiconductor region, a source region, a drain region, a floating gate region, a tunnel oxide region, an oxide-nitride-oxide region, and a control gate region. A floating gate transistor or block of floating gate transistors can be written to multiple times in order to accumulate charge on one or more floating gate regions in accordance with an embodiment of the invention. When exposed to radiation, a floating gate region can retain its charge above a certain voltage threshold. A block of floating gate transistors can communicate with an external device where the external device can read a state of the block of floating gate transistors in accordance with an embodiment of the invention.Type: ApplicationFiled: January 27, 2017Publication date: May 18, 2017Inventors: Matthew Kay, James David Ingalls, Matthew Gadlage, Adam Duncan, Andrew Howard
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Publication number: 20170103818Abstract: Apparatuses and methods are provided using a plurality of interrupted IC operations to detect various conditions or changes of interest to integrated circuit (IC) elements (e.g., memory cells of NAND Flash memories or floating gate transistor) such as program/erase stress, total ionizing dose, and heavy ion exposure which modify normal IC element bit state changes. An exemplary method can include controlling a plurality of selected IC elements to execute a series of PROGRAM or ERASE operations on all of the plurality of selected elements that are each interrupted or halted before a normal or first time period required for the PROGRAM or ERASE operation has elapsed. An exemplary system records a number of interrupted operations required to cause a state change in each of the plurality of selected IC elements. Embodiments of the invention enable detection of stresses far below at least some thresholds for IC element or bit cell failure.Type: ApplicationFiled: July 11, 2016Publication date: April 13, 2017Inventors: Austin H. Roach, Matthew Gadlage, Adam Duncan, James David Ingalls, Matthew Kay
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Patent number: 9620242Abstract: Apparatuses and methods are provided using a plurality of interrupted IC operations to detect various conditions or changes of interest to integrated circuit (IC) elements (e.g., memory cells of NAND Flash memories or floating gate transistor) such as program/erase stress, total ionizing dose, and heavy ion exposure which modify normal IC element bit state changes. An exemplary method can include controlling a plurality of selected IC elements to execute a series of PROGRAM or ERASE operations on all of the plurality of selected elements that are each interrupted or halted before a normal or first time period required for the PROGRAM or ERASE operation has elapsed. An exemplary system records a number of interrupted operations required to cause a state change in each of the plurality of selected IC elements. Embodiments of the invention enable detection of stresses far below at least some thresholds for IC element or bit cell failure.Type: GrantFiled: July 11, 2016Date of Patent: April 11, 2017Assignee: The United States of America as represented by the Secretary of the NavyInventors: Austin H. Roach, Matthew Gadlage, Adam Duncan, James David Ingalls, Matthew Kay
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Patent number: 9601214Abstract: A method of improving radiation tolerance of floating gate memories is provided herein. Floating gate memories can include a floating gate transistor or a block of floating gate transistors. A floating gate transistor can include a semiconductor region, a source region, a drain region, a floating gate region, a tunnel oxide region, an oxide-nitride-oxide region, and a control gate region. A floating gate transistor or block of floating gate transistors can be written to multiple times in order to accumulate charge on one or more floating gate regions in accordance with an embodiment of the invention. When exposed to radiation, a floating gate region can retain its charge above a certain voltage threshold. A block of floating gate transistors can communicate with an external device where the external device can read a state of the block of floating gate transistors in accordance with an embodiment of the invention.Type: GrantFiled: June 6, 2016Date of Patent: March 21, 2017Assignee: The United States of America as represented by the Secretary of the NavyInventors: Matthew Kay, James David Ingalls, Matthew Gadlage, Adam Duncan, Andrew Howard
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Patent number: 9536620Abstract: A method of improving radiation tolerance of floating gate memories is provided herein. Floating gate memories can include a floating gate transistor or a block of floating gate transistors. A floating gate transistor can include a semiconductor region, a source region, a drain region, a floating gate region, a tunnel oxide region, an oxide-nitride-oxide region, and a control gate region. A floating gate transistor or block of floating gate transistors can be written to multiple times in order to accumulate charge on one or more floating gate regions in accordance with an embodiment of the invention. When exposed to radiation, a floating gate region can retain its charge above a certain voltage threshold. A block of floating gate transistors can communicate with an external device where the external device can read a state of the block of floating gate transistors in accordance with an embodiment of the invention.Type: GrantFiled: December 3, 2015Date of Patent: January 3, 2017Assignee: The United States of America as represented by the Secretary of the NavyInventors: Matthew Kay, James David Ingalls, Matthew Gadlage, Adam Duncan, Andrew Howard
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Publication number: 20160284418Abstract: A method of improving radiation tolerance of floating gate memories is provided herein. Floating gate memories can include a floating gate transistor or a block of floating gate transistors. A floating gate transistor can include a semiconductor region, a source region, a drain region, a floating gate region, a tunnel oxide region, an oxide-nitride-oxide region, and a control gate region. A floating gate transistor or block of floating gate transistors can be written to multiple times in order to accumulate charge on one or more floating gate regions in accordance with an embodiment of the invention. When exposed to radiation, a floating gate region can retain its charge above a certain voltage threshold. A block of floating gate transistors can communicate with an external device where the external device can read a state of the block of floating gate transistors in accordance with an embodiment of the invention.Type: ApplicationFiled: June 6, 2016Publication date: September 29, 2016Inventors: Matthew Kay, James David Ingalls, Matthew Gadlage, Adam Duncan, Andrew Howard
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Publication number: 20160086676Abstract: A method of improving radiation tolerance of floating gate memories is provided herein. Floating gate memories can include a floating gate transistor or a block of floating gate transistors. A floating gate transistor can include a semiconductor region, a source region, a drain region, a floating gate region, a tunnel oxide region, an oxide-nitride-oxide region, and a control gate region. A floating gate transistor or block of floating gate transistors can be written to multiple times in order to accumulate charge on one or more floating gate regions in accordance with an embodiment of the invention. When exposed to radiation, a floating gate region can retain its charge above a certain voltage threshold. A block of floating gate transistors can communicate with an external device where the external device can read a state of the block of floating gate transistors in accordance with an embodiment of the invention.Type: ApplicationFiled: December 3, 2015Publication date: March 24, 2016Inventors: Matthew Kay, James David Ingalls, Matthew Gadlage, Adam Duncan, Andrew Howard
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Patent number: 9263139Abstract: A method of improving radiation tolerance of floating gate memories is provided herein. Floating gate memories can include a floating gate transistor or a block of floating gate transistors. A floating gate transistor can include a semiconductor region, a source region, a drain region, a floating gate region, a tunnel oxide region, an oxide-nitride-oxide region, and a control gate region. A floating gate transistor or block of floating gate transistors can be written to multiple times in order to accumulate charge on one or more floating gate regions in accordance with an embodiment of the invention. When exposed to radiation, a floating gate region can retain its charge above a certain voltage threshold. A block of floating gate transistors can communicate with an external device where the external device can read a state of the block of floating gate transistors in accordance with an embodiment of the invention.Type: GrantFiled: September 30, 2014Date of Patent: February 16, 2016Assignee: The United States of America as represented by the Secretary of the NavyInventors: Matthew Kay, James David Ingalls, Matthew Gadlage, Adam Duncan, Andrew Howard
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Publication number: 20150138887Abstract: A method of improving radiation tolerance of floating gate memories is provided herein. Floating gate memories can include a floating gate transistor or a block of floating gate transistors. A floating gate transistor can include a semiconductor region, a source region, a drain region, a floating gate region, a tunnel oxide region, an oxide-nitride-oxide region, and a control gate region. A floating gate transistor or block of floating gate transistors can be written to multiple times in order to accumulate charge on one or more floating gate regions in accordance with an embodiment of the invention. When exposed to radiation, a floating gate region can retain its charge above a certain voltage threshold. A block of floating gate transistors can communicate with an external device where the external device can read a state of the block of floating gate transistors in accordance with an embodiment of the invention.Type: ApplicationFiled: September 30, 2014Publication date: May 21, 2015Inventors: Matthew Kay, James David Ingalls, Matthew Gadlage, Adam Duncan, Andrew Howard
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Publication number: 20070240539Abstract: An article (101) for insertion into molten steel (102) to increase titanium content of the steel. The article comprises a container (201) formed from a metal or metal alloy, and a mixture (202) enclosed within the container. The mixture comprises: iron in the form of an oxide; titanium in the form of an oxide; and aluminium or aluminium alloy. The mixture is such that when heated it reacts to oxidise the aluminium and produce ferro-titanium alloy.Type: ApplicationFiled: July 7, 2005Publication date: October 18, 2007Inventor: David Ingall
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Publication number: 20070189764Abstract: Various embodiments and methods relating to a camera mount are disclosed.Type: ApplicationFiled: February 13, 2006Publication date: August 16, 2007Inventors: David Ingalls, Marvin Casperson, Scott Grasley