Abstract: A system for connecting and disconnecting rail vehicle system for storing, transporting, and delivering bulk electric energy using railroads is described. The system includes. The system includes at least one rail vehicle system. The rail vehicle system includes a locomotive and a group of rail cars. The group of rails cars includes several rail cars with energy storage, power electronics and communication system. The rail car further includes a pantograph. The system also includes a plurality of electrical feeders. The electrical feeders are substantially dedicated for providing power transfer to and from the respective groups of rail cars. The system further includes at least one position controls system.

Abstract: A multi-electrode device that includes an anode electrode, a cathode electrode, and a gate electrode situated between the anode and cathode, and having an electrolyte. The multi-electrode device can be a secondary (rechargeable) electrochemical cell. The gate electrode is permeable to at least one mobile species which is redox-active at at least one of the anode and cathode. The gate electrode has a resistance that is lower than that of a conductive non-uniform morphological feature that could be grown on the anode. The gate electrode provides the ability to avoid, recognize, and remove the presence of such non-uniform morphological features, and provides an electrical electrode that can be used to remove such non-uniform morphological features.

Abstract: A multi-electrode device that includes an anode electrode, a cathode electrode, and a gate electrode situated between the anode and cathode, and having an electrolyte. The multi-electrode device can be a secondary (rechargeable) electrochemical cell. The gate electrode is permeable to at least one mobile species which is redox-active at at least one of the anode and cathode. The gate electrode has a resistance that is lower than that of a conductive non-uniform morphological feature that could be grown on the anode. The gate electrode provides the ability to avoid, recognize, and remove the presence of such non-uniform morphological features, and provides an electrical electrode that can be used to remove such non-uniform morphological features.

Abstract: A multi-electrode device that includes an anode electrode, a cathode electrode, and a gate electrode situated between the anode and cathode, and having an electrolyte. The multi-electrode device can be a secondary (rechargeable) electrochemical cell. The gate electrode is permeable to at least one mobile species which is redox-active at at least one of the anode and cathode. The gate electrode has a resistance that is lower than that of a conductive non-uniform morphological feature that could be grown on the anode. The gate electrode provides the ability to avoid, recognize, and remove the presence of such non-uniform morphological features, and provides an electrical electrode that can be used to remove such non-uniform morphological features.

Abstract: A multi-electrode device that includes an anode electrode, a cathode electrode, and a gate electrode situated between the anode and cathode, and having an electrolyte. The multi-electrode device can be a secondary (rechargeable) electrochemical cell. The gate electrode is permeable to at least one mobile species which is redox-active at at least one of the anode and cathode. The gate electrode has a resistance that is lower than that of a conductive non-uniform morphological feature that could be grown on the anode. The gate electrode provides the ability to avoid, recognize, and remove the presence of such non-uniform morphological features, and provides an electrical electrode that can be used to remove such non-uniform morphological features.

Abstract: A multi-electrode device that includes an anode electrode, a cathode electrode, and a gate electrode situated between the anode and cathode, and having an electrolyte. The multi-electrode device can be a secondary (rechargeable) electrochemical cell. The gate electrode is permeable to at least one mobile species which is redox-active at at least one of the anode and cathode. The gate electrode has a resistance that is lower than that of a conductive non-uniform morphological feature that could be grown on the anode. The gate electrode provides the ability to avoid, recognize, and remove the presence of such non-uniform morphological features, and provides an electrical electrode that can be used to remove such non-uniform morphological features.

Abstract: A multi-electrode device that includes an anode electrode, a cathode electrode, and a gate electrode situated between the anode and cathode, and having an electrolyte. The multi-electrode device can be a secondary (rechargeable) electrochemical cell. The gate electrode is permeable to at least one mobile species which is redox-active at at least one of the anode and cathode. The gate electrode has a resistance that is lower than that of a conductive non-uniform morphological feature that could be grown on the anode. The gate electrode provides the ability to avoid, recognize, and remove the presence of such non-uniform morphological features, and provides an electrical electrode that can be used to remove such non-uniform morphological features.

Abstract: A multi-electrode device that includes an anode electrode, a cathode electrode, and a gate electrode situated between the anode and cathode, and having an electrolyte. The multi-electrode device can be a secondary (rechargeable) electrochemical cell. The gate electrode is permeable to at least one mobile species which is redox-active at at least one of the anode and cathode. The gate electrode has a resistance that is lower than that of a conductive non-uniform morphological feature that could be grown on the anode. The gate electrode provides the ability to avoid, recognize, and remove the presence of such non-uniform morphological features, and provides an electrical electrode that can be used to remove such non-uniform morphological features.

Abstract: A multi-electrode device that includes an anode electrode, a cathode electrode, and a gate electrode situated between the anode and cathode, and having an electrolyte. The multi-electrode device can be a secondary (rechargeable) electrochemical cell. The gate electrode is permeable to at least one mobile species which is redox-active at at least one of the anode and cathode. The gate electrode has a resistance that is lower than that of a conductive non-uniform morphological feature that could be grown on the anode. The gate electrode provides the ability to avoid, recognize, and remove the presence of such non-uniform morphological features, and provides an electrical electrode that can be used to remove such non-uniform morphological features.

Abstract: Embodiments as described herein provide methods for depositing a material on a substrate during electroless deposition processes, as well as compositions of the electroless deposition solutions. In one embodiment, the substrate contains a contact aperture having an exposed silicon contact surface. In another embodiment, the substrate contains a contact aperture having an exposed silicide contact surface. The apertures are filled with a metal contact material by exposing the substrate to an electroless deposition process. The metal contact material may contain a cobalt material, a nickel material, or alloys thereof. Prior to filling the apertures, the substrate may be exposed to a variety of pretreatment processes, such as preclean processes and activations processes. A preclean process may remove organic residues, native oxides, and other contaminants during a wet clean process or a plasma etch process. Embodiments of the process also provide the deposition of additional layers, such as a capping layer.

Abstract: Embodiments as described herein provide methods for depositing a material on a substrate during electroless deposition processes, as well as compositions of the electroless deposition solutions. In one embodiment, the substrate contains a contact aperture having an exposed silicon contact surface. In another embodiment, the substrate contains a contact aperture having an exposed silicide contact surface. The apertures are filled with a metal contact material by exposing the substrate to an electroless deposition process. The metal contact material may contain a cobalt material, a nickel material, or alloys thereof. Prior to filling the apertures, the substrate may be exposed to a variety of pretreatment processes, such as preclean processes and activations processes. A preclean process may remove organic residues, native oxides, and other contaminants during a wet clean process or a plasma etch process. Embodiments of the process also provide the deposition of additional layers, such as a capping layer.

Abstract: The present invention comprises a method of forming a zinc oxide based thin film transistor by blanket depositing the zinc oxide layer and the source-drain metal layer and then wet etching through the zinc oxide while etching through the source-drain electrode layer. Thereafter, the active channel is formed by dry etching the source-drain electrode layer without effectively etching the zinc oxide layer.

Abstract: Embodiments as described herein provide methods for depositing a material on a substrate during electroless deposition processes, as well as compositions of the electroless deposition solutions. In one embodiment, the substrate contains a contact aperture having an exposed silicon contact surface. In another embodiment, the substrate contains a contact aperture having an exposed silicide contact surface. The apertures are filled with a metal contact material by exposing the substrate to an electroless deposition process. The metal contact material may contain a cobalt material, a nickel material, or alloys thereof. Prior to filling the apertures, the substrate may be exposed to a variety of pretreatment processes, such as preclean processes and activations processes. A preclean process may remove organic residues, native oxides, and other contaminants during a wet clean process or a plasma etch process. Embodiments of the process also provide the deposition of additional layers, such as a capping layer.

Abstract: In a module of photovoltaic cells, a method of forming the module interconnects includes a single cutting process after the deposition of all active layers. This simplifies the overall process to a set of vacuum steps followed by a set of interconnect steps, and may significantly module quality and yield. According to another aspect, an interconnect forming method includes self-aligned deposition of an insulator. This simplifies the process because no alignment is required. According to another aspect, an interconnect forming method includes a scribing process that results in a much narrower interconnect which may significantly boost cell efficiency, and allow for narrower cell sizes. According to another aspect, an interconnect includes an insulator layer that greatly reduces shunt current through the active layer, which can greatly improve cell efficiency.

Abstract: In a module of photovoltaic cells, a method of forming the module interconnects includes a single cutting process after the deposition of all active layers. This simplifies the overall process to a set of vacuum steps followed by a set of interconnect steps, and may significantly module quality and yield. According to another aspect, an interconnect forming method includes self-aligned deposition of an insulator. This simplifies the process because no alignment is required. According to another aspect, an interconnect forming method includes a scribing process that results in a much narrower interconnect which may significantly boost cell efficiency, and allow for narrower cell sizes. According to another aspect, an interconnect includes an insulator layer that greatly reduces shunt current through the active layer, which can greatly improve cell efficiency.

Abstract: The present invention relates to configuring and wiring together cells in TF PV modules. According to one aspect, cells are fabricated on one plane on a top surface of a substrate, with wiring patterned on a parallel plane, and vias formed to provide connections between the cell plane and wiring plane. In one embodiment, the wiring plane is on the back surface of the substrate and vias are formed through the substrate. In another embodiment, the wiring plane is on the top surface of the substrate underneath the cell plane and an insulating layer, with the vias formed through the insulating layer. In another embodiment, the cell plane formed on the top surface includes superstrate cells that are illuminated through a transparent substrate, with an insulator between the cell plane and an upper wiring plane. According to another aspect, the heavy bus bar connections in the wiring plane can carry large currents and do not block light impinging on the cells.

Abstract: The present invention comprises a method of forming a zinc oxide based thin film transistor by blanket depositing the zinc oxide layer and the source-drain metal layer and then wet etching through the zinc oxide while etching through the source-drain electrode layer. Thereafter, the active channel is formed by dry etching the source-drain electrode layer without effectively etching the zinc oxide layer.

Abstract: The present invention generally relates to the creation of fuel cell components and the method of forming the various fuel cell components that have an improved lifetime, lower production cost and improved process performance. The invention generally includes treating or conditioning a substrate surface by depositing a material layer, or layers, having good adhesion to the substrate, low electrical resistivity (high conductivity) and has good resistance to chemical attack during the operation of fuel cell. The substrate may be, for example, a fuel cell part, a conductive plate, a separator plate, a bipolar plate or an end plate, among others. In one embodiment, the substrate surface is treated or conditioned by exposing at least a portion of it to a gas or liquid comprising ruthenium tetroxide.

Abstract: Disclosed is a method of making a semiconductor device that comprises MBE at substrate temperatures substantially lower than conventionally used temperatures. A significant aspect of the method is the ability to produce highly doped (e.g., 10.sup.19 cm.sup.-3) epitaxial single crystal Si layers. The deposition can be carried out such that substantially all (at least 90%) dopant atoms are electrically active at 20.degree. C. However, the method is not limited to Si MBE. Exemplarily, the method can be used to produce epitaxial single crystal GaAs having very short (e.g., <100ps) carrier lifetime. Such material can be useful for, e.g., high speed photodetectors. Incorporation into the method of a relatively low temperature rapid thermal anneal makes possible low temperature MBE growth of relatively thick semiconductor layers.