Patents by Inventor David J. Garcia
David J. Garcia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240131680Abstract: Systems and methods are provided for delivering a work part to an assembly line worker using a dolly assembly in a first configuration and retrieving the work part from the dolly assembly by the assembly line work while the dolly assembly is in a second configuration. According to some embodiments, a dolly assembly is provided comprising a base assembly having a support member and a mobility mechanism, the support member positioned obliquely with respect to a horizontal plane. The dolly assembly also includes a part-carrying member rotationally connected to the support member and having a part-holding structure for receiving a work part. The part-carrying member extends downward at an angle below the horizontal plane when in a first configuration, and extends upward from at an angle above the horizontal plane when in a second configuration.Type: ApplicationFiled: October 19, 2022Publication date: April 25, 2024Applicants: TOYOTA MOTOR ENGINEERING & MANUFACTURING NORTH AMERICA, INC., TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: LLOYD R. HOLLAND, SCOTTIE L. FOSTER, BRADLEY J. GARCIA, MICHAEL C. GREENLEE, JEFFREY L. JAMES, ANNETTA L. ALLEN, JOHNNY O. BOARMAN 4TH, DAVID A. LAJOICE
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Patent number: 9139060Abstract: A travel trailer stabilizing system having a right and left compound above-axle strut for bracing a trailer body at the axle or axles, each compound strut having an overlever arm for applying a stiffening force with a mechanical advantage to oppose any oscillatory motion of the frame on the tires. The mechanical advantage of the lever is configured to transfer a part of the weight of the trailer from the tires to the rigid struts.Type: GrantFiled: August 16, 2014Date of Patent: September 22, 2015Inventors: Rocky E Armstrong, David J Garcia
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Publication number: 20140353942Abstract: A travel trailer stabilizing system having a right and left compound above-axle strut for bracing a trailer body at the axle or axles, each compound strut having an overlever arm for applying a stiffening force with a mechanical advantage to oppose any oscillatory motion of the frame on the tires. The mechanical advantage of the lever is configured to transfer a part of the weight of the trailer from the tires to the rigid struts.Type: ApplicationFiled: August 16, 2014Publication date: December 4, 2014Inventors: Rocky E. Armstrong, David J. Garcia
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Patent number: 8840144Abstract: A travel trailer stabilizing system having a right and left compound above-axle strut for bracing the trailer body at the axle or axles, each compound strut having an overlever arm for applying a stiffening force with a mechanical advantage to oppose any oscillatory motion of the frame on the tires. The mechanical advantage of the lever is configured to transfer a part of the weight of the trailer from the tires to the rigid struts.Type: GrantFiled: May 20, 2013Date of Patent: September 23, 2014Inventors: Rocky E Armstrong, David J Garcia
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Patent number: 8799706Abstract: A method and system of exchanging information between processors. At least some of the illustrative embodiments may be a method comprising exchanging information between a plurality of processors by writing (by a first processor) a first datum to a logic device and then continuing processing of a user program by the first processor, writing (by a second processor) a second datum to the logic device and then continuing processing of a user program by the second processor, and writing (by the logic device) the first and second datum to each of the first and second processors after all the processors have written their respective datum to the logic device.Type: GrantFiled: January 25, 2005Date of Patent: August 5, 2014Assignee: Hewlett-Packard Development Company, L.P.Inventors: William F. Bruckert, David J. Garcia, Thomas A. Heynemann, James S. Klecka, Jeffrey A. Sprouse
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Publication number: 20130313813Abstract: A travel trailer stabilizing system having a right and left compound above-axle strut for bracing the trailer body at the axle or axles, each compound strut having an overlever arm for applying a stiffening force with a mechanical advantage to oppose any oscillatory motion of the frame on the tires. The mechanical advantage of the lever is configured to transfer a part of the weight of the trailer from the tires to the rigid struts.Type: ApplicationFiled: May 20, 2013Publication date: November 28, 2013Inventors: Rocky E. Armstrong, David J. Garcia
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Patent number: 8291176Abstract: The disclosed embodiments may relate to protection domain group, which may include a memory region associated with a process. The protection domain group may also include a plurality of memory windows associated with the memory region. Also included may be a plurality of protection domains, each of which may correspond to a memory window. The protection domains may allow access to the memory region via a corresponding memory window.Type: GrantFiled: March 27, 2003Date of Patent: October 16, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Jeffrey Hilland, David J. Garcia
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Patent number: 7933966Abstract: A method and system of copying a memory area between processor elements for lock-step execution. At least some of the illustrative embodiments may be a method comprising executing duplicate copies of a first program in a first processor of a first multiprocessor computer system and in a first processor of a second multiprocessor computer system (the executing substantially in lock-step), executing a second program in a second processor element of the first multiprocessor computer system (the first and second processors of the first multiprocessor computer system sharing an input/output (I/O) bridge), copying a memory area of the second program executing in the second processor element of the first multiprocessor computer system to a memory of a second processor element in the second multiprocessor computer system while the duplicate copies of the first program are executing in the first processor elements, and then executing duplicate copies of the second program in the second processors in lock-step.Type: GrantFiled: April 26, 2005Date of Patent: April 26, 2011Assignee: Hewlett-Packard Development Company, L.P.Inventors: Thomas J. Kondo, Robert L. Jardine, James S. Klecka, William F. Bruckert, David J. Garcia, James R. Smullen, Patrick H. Barnes
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Patent number: 7890706Abstract: In a system including multiple-slice processors and memories, a synchronization unit with race avoidance capability includes a delegated write engine that receives data and memory address information from the processors and writes data to the memory as a delegate for the processors.Type: GrantFiled: November 16, 2004Date of Patent: February 15, 2011Assignee: Hewlett-Packard Development Company, L.P.Inventors: David J. Garcia, Michael Knowles, Tom A. Heynemann, Jeffrey A. Sprouse
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Patent number: 7757232Abstract: An apparatus employs a work request list to access a memory device. The apparatus comprises an upper layer protocol that generates the work request list comprising a plurality of work requests, the work request list having an attribute that indicates the number of the plurality of work requests in the work request list. The apparatus additionally comprises an interface that is adapted to receive the work request list and individually enqueue the plurality of work requests.Type: GrantFiled: August 14, 2003Date of Patent: July 13, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Jeffrey R. Hilland, Mallikarjun Chadalapaka, Michael R. Krause, Paul R. Culley, David J. Garcia
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Patent number: 7590885Abstract: A method and system of copying memory from a source processor to a target processor by duplicating memory writes. At least some of the exemplary embodiments may be a method comprising stopping execution of a user program on a target processor (the target processor coupled to a first memory), continuing to execute a duplicate copy of the user program on a source processor (the source processor coupled to a second memory and generating writes to the second memory), duplicating memory writes of the source processor and duplicating writes by input/output adapters to create a stream of duplicate memory writes, and applying the duplicated memory writes to the first memory.Type: GrantFiled: April 26, 2005Date of Patent: September 15, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: Thomas J. Kondo, Robert L Jardine, William F. Bruckert, David J. Garcia, James S. Klecka, James R. Smullen, Jeff Sprouse, Graham B. Stott
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Patent number: 7565504Abstract: The disclosed embodiments may relate to memory window access, which may include a memory window and protection domain associated with a process. The memory window access setting or bit may also allow a plurality of memory windows to be associated with a protection domain for a process. The memory window access setting or bit may allow access to the memory window to be for the queue pairs in a certain protection domain or a designated queue pair.Type: GrantFiled: March 27, 2003Date of Patent: July 21, 2009Assignee: Hewlett-Packard Development Company, L.P.Inventors: David J. Garcia, Jeffrey R. Hilland, Paul R. Culley
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Patent number: 7434098Abstract: Method and system of determining whether a user program has made a system level call and thus whether the user program is uncooperative with fault tolerant operation. Some exemplary embodiments may be a processor-based method comprising providing information from a first processor to a second processor (the information indicating that a user program executed on the first processor has not made a system level call in a predetermined amount of time), and determining by the first processor, using information from the second processor, whether a duplicate copy of the user program substantially simultaneously executed in the second processor has made a system level call in the predetermined amount of time.Type: GrantFiled: January 25, 2005Date of Patent: October 7, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: David L. Bernick, William F. Bruckert, David J. Garcia, Robert L. Jardine, Pankaj Mehra, James R. Smullen
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Patent number: 7426656Abstract: A method and system of loosely lock-stepped non-deterministic processors. Some exemplary embodiments may be a processor-based method comprising executing fault tolerant copies of a user program, one copy of the user program executed in a first processor performing non-deterministic execution, and a duplicate copy of the user program executing in a second processor performing non-deterministic execution, with the executing in the first processor and second processor not in cycle-by-cycle lock-stepped.Type: GrantFiled: January 25, 2005Date of Patent: September 16, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: David L. Bernick, William F. Bruckert, David J. Garcia, Robert L. Jardine, James S. Klecka, Pankaj Mehra, James R. Smullen
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Publication number: 20070282967Abstract: A method and system of implementing a persistent memory. At least some of the illustrative embodiments are a system comprising a first computer slice comprising a memory, a second computer slice comprising a memory (the second computer slice coupled to the first computer slice by way of a communication network at least partially external to each computer slice), and a persistent memory comprising at least a portion of the memory of each computer slice (the portion of the memory of the first computer slice storing a duplicate copy of data stored in the portion of the memory of the second computer slice). The persistent memory is accessible to an application program through the communication network.Type: ApplicationFiled: June 5, 2006Publication date: December 6, 2007Inventors: Samuel A. Fineberg, Pankaj Mehra, David J. Garcia, William F. Bruckert
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Patent number: 7190263Abstract: A mobile telephone (105) with a camera feature (110) that functions as a motion detection device. The mobile telephone can include an image capture software routine (120) and a motion detection software routine (125). The image capture software routine can use the camera feature to automatically generate one or more time spaced images. The motion detection software routine can detect motion based upon differences between the time spaced images. The motion detection software routine can selectively utilize a multiple algorithms.Type: GrantFiled: September 20, 2004Date of Patent: March 13, 2007Assignee: Motorola, Inc.Inventors: Brent M. McKay, David J. Garcia, Dipen T. Patel, Anthony V. Skujins, James E. Smith, Ricardo Martinez
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Patent number: 7171484Abstract: A distributed computer system includes a source endnode including a source process which produces message data and a send work queue having work queue elements that describe the message data for sending. A destination endnode includes a destination process and a receive work queue having work queue elements that describe where to place incoming message data. A communication fabric provides communication between the source endnode and the destination endnode. An end-to-end context is provided at the source endnode and the destination endnode storing state information to ensure the reception and sequencing of message data sent from the source endnode to the destination endnode permitting reliable datagram service between the source endnode and the destination endnode.Type: GrantFiled: May 24, 2000Date of Patent: January 30, 2007Inventors: Michael R. Krause, David J. Garcia, Paul R. Culley, Renato J. Recio, Alan F. Benner
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Patent number: 7103744Abstract: The disclosed embodiments may relate to memory window access and may include a memory window and plurality of queue pairs associated with a process. Each of the plurality of queue pairs may be associated with a memory window context that may have queue pair information. The memory window may be associated with a memory window context that includes a protection information field. Accordingly, access to memory window may be allowed if the queue pair information matches the protection information field.Type: GrantFiled: March 27, 2003Date of Patent: September 5, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: David J. Garcia, Jeffrey R. Hilland, Paul R. Culley, Dwight L. Barron, Michael R. Krause
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Patent number: 7089378Abstract: The disclosed embodiments relate to a queuing mechanism that may comprise a shared receive queue having a plurality of buffers. The queuing mechanism may also comprise a plurality of queue pairs, each of the plurality of queue pairs having a receive queue that comprises at least one of the plurality of buffers.Type: GrantFiled: March 27, 2003Date of Patent: August 8, 2006Assignee: Hewlett-Packard Development Company, l.P.Inventors: Mallikarjun Chadalapaka, David J. Garcia, Jeffrey R. Hilland, Paul R. Culley
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Patent number: 7016971Abstract: A distributed computer system includes links and routing devices coupled between the links and routing frames between the links. Each of the routing devices includes a congestion control mechanism for detecting congestion at the routing device and responding to detected congestion by gradually reducing an injection rate of frames routed from the routing device.Type: GrantFiled: May 24, 2000Date of Patent: March 21, 2006Assignees: Hewlett-Packard Company, IBM Corporation, Compaq Computer Corporation, Adaptec, Inc.Inventors: Renato J. Recio, David J. Garcia, Michael R. Krause, Patricia A. Thaler, John C. Krause