Abstract: A flexible optical fiber connector comprises a first housing component configured to couple to a terminating connector, and a second housing component configured to receive an optical fiber for termination in the terminating connector. The first housing component and the second housing component are further configured to receive a pushable connector therethrough. A flexible optical fiber connector assembly comprises a flexible connector and a terminating connector coupled thereto. The flexible connector assembly is configured to couple to an adapter held by a holder coupled to a port.

Abstract: Some embodiments include an integrated assembly having first conductive structures extending along a first direction. Spaced-apart upwardly-opening container-shapes are over the first conductive structures. Each of the container-shapes has a first sidewall region, a second sidewall region, and a bottom region extending from the first sidewall region to the second sidewall region. Each of the first and second sidewall regions includes a lower source/drain region, an upper source/drain region, and a channel region between the upper and lower source/drain regions. The lower source/drain regions are electrically coupled with the first conductive structures. Second conductive structures extend along a second direction which crosses the first direction. The second conductive structures have gate regions operatively adjacent the channel regions. Storage elements are electrically coupled with the upper source/drain regions. Some embodiments include methods of forming integrated assemblies.

Abstract: This disclosure provides compositions, films, labels, structures and methods that may include a substrate having a first side and a second side, wherein the first side comprises a skin layer comprising at least 50 wt. % of high-density polyethylene. Further, the compositions may include a coating on the skin layer, wherein the coating comprises a topcoat and a primer, wherein the topcoat consists of: (i) at least 50 wt. % high-density polyethylene and one or more polyethylene polymers in water; (ii) wax, silicone or combination thereof; and (iii) optionally additives, whereupon imaging the composition by a thermal print head at a temperature of 300° C. or less results in no or negligible solvent-penetrability beneath the skin layer.

Abstract: This disclosure provides methods, systems and devices that may be used to measure, calculate, and orient a device such as a drill bit in a downhole environment. To that end, disclosed are fiber optic gyroscopes, wherein the fiber optic gyroscopes comprise elliptical fiber optic cable coils in a mutually orthogonal arrangement that is tilted relative to a length of a supporting shaft, e.g., tube. Light travels in opposite directions within each of the elliptical fiber optic cable coils, and, subsequently, sensors detect differences in time for each light path of the light that traveled in opposite directions within each one of the elliptical fiber optic cable coils. The elliptical nature of the fiber optic cable coils minimizes the cross-sectional area of the mutually orthogonal arrangement, and thereby makes it well-suited for use in downhole environments where space is at a premium. This disclosure also may provide an inertial measurement unit.

Abstract: Methods and structures provide an electrostatic discharge (ESD) indicator including an electric field sensitive material configured to undergo a specific color change in response to an electric field. An exposure of the structure to an ESD can be visually determined via the specific color change of the ESD indicator.

Abstract: Methods and structures provide an electrostatic discharge (ESD) indicator including an electric field sensitive material configured to undergo a specific color change in response to an electric field. An exposure of the structure to an ESD can be visually determined via the specific color change of the ESD indicator.

Abstract: Methods and structures provide an electrostatic discharge (ESD) indicator including an electric field sensitive material configured to undergo a specific color change in response to an electric field. An exposure of the structure to an ESD can be visually determined via the specific color change of the ESD indicator.

Abstract: Aspects of the disclosure provide a method of inhibiting crack propagation in a silicon wafer. In one embodiment, a method of repairing an imperfection on a surface of a semiconductor device is disclosed. The method includes: screening for imperfections on a surface of a silicon wafer of a semiconductor device; and in response to at least one imperfection on the surface of the silicon wafer, depositing a material on the surface of the silicon wafer.

Abstract: Stacked multichip packages and methods of making multichip packages. A method includes using a boat having different depth openings corresponding to the length of column interconnections of the completed multichip package and masks to place proper length columns in the corresponding depth openings; placing an integrated circuit chip on the boat and attaching exposed upper ends of the columns to respective chip pads of the integrated circuit using a first solder reflow process and attaching a preformed package substrate integrated circuit chip stack to the integrated circuit and attached columns using a second solder reflow process.

Abstract: Stacked multichip packages and methods of making multichip packages. A method includes using a boat having different depth openings corresponding to the length of column interconnections of the completed multichip package and masks to place proper length columns in the corresponding depth openings; placing an integrated circuit chip on the boat and attaching exposed upper ends of the columns to respective chip pads of the integrated circuit using a first solder reflow process and attaching a preformed package substrate integrated circuit chip stack to the integrated circuit and attached columns using a second solder reflow process.

Abstract: Aspects of the present invention relate to a controlled collapse chip connection (C4) structures. Various embodiments include a method of forming a controlled collapse chip connection (C4) structure. The method can include: providing a precursor structure including: a substrate, a dielectric over the substrate, the dielectric including a plurality of trenches exposing a portion of the substrate, and a metal layer over the dielectric and the portion of the substrate in each of the plurality of trenches, forming a resist layer over the metal layer, forming a rigid liner over a surface of the resist layer and the metal layer, and forming solder over the rigid liner between portions of the resist layer.

Abstract: Aspects of the disclosure provide a method of inhibiting crack propagation in a silicon wafer. In one embodiment, a method of repairing an imperfection on a surface of a semiconductor device is disclosed. The method includes: screening for imperfections on a surface of a silicon wafer of a semiconductor device; and in response to at least one imperfection on the surface of the silicon wafer, depositing a material on the surface of the silicon wafer.

Abstract: Aspects of the present invention relate to a controlled collapse chip connection (C4) structures. Various embodiments include a method of forming a controlled collapse chip connection (C4) structure. The method can include: providing a precursor structure including: a substrate, a dielectric over the substrate, the dielectric including a plurality of trenches exposing a portion of the substrate, and a metal layer over the dielectric and the portion of the substrate in each of the plurality of trenches, forming a resist layer over the metal layer, forming a rigid liner over a surface of the resist layer and the metal layer, and forming solder over the rigid liner between portions of the resist layer.

Abstract: Methods and structures provide an electrostatic discharge (ESD) indicator including an electric field sensitive material configured to undergo a specific color change in response to an electric field. An exposure of the structure to an ESD can be visually determined via the specific color change of the ESD indicator.

Abstract: A heat sink for cooling a heat-generating device includes a base and a cooling section coupled thereto for cooling the device. The cooling section includes a plurality of flow tubes, each flow tube having an inlet, an outlet, and a bounding wall that defines a closed fluid flow path from the inlet to the outlet. Each of the flow tubes includes a central axis that is substantially parallel to a reference plane of the heat-generating device. The flow tubes may be arranged in a layered stack and include a bounding wall that has a thickness that decreases with increasing distance in the layered stack. The flow tubes may also include a cross-sectional area that decreases with increasing distance in the layered stack. Furthermore, the bounding wall of the flow tubes may have a non-planar configuration in a direction generally parallel to the central axis.

Abstract: A fiber-optic surveillance system (10) includes a fiber-optic sensor (15) comprising a serial array (15) of fiber-optic point-sensors (16), successive point-sensors being linked by a distributed fiber-optic sensor (18). The system allows the location of intruder events along the sensor to be determined, and provides a reduction in the incidence of false-alarms compared to prior art systems.

Abstract: Methods for making, and structures so made for producing integrated circuit (IC) chip packages without forming micro solder balls. In one embodiment, a method may include placing a solid grid made from an organic material between the IC chip and the substrate. The grid provides a physical barrier between each of a plurality of Controlled Collapse Chip Connections, and thereby prevents the formation of micro solder balls between them, thus improving chip performance and reliability.

Abstract: A rectangular-shaped controlled collapse chip connection (C4) is described. In one embodiment, there is a semiconductor chip package that comprises a semiconductor chip package substrate and a semiconductor chip having a plurality of rectangular-shaped C4 contacts attached thereto that connect the semiconductor chip to the semiconductor chip package substrate. The plurality of rectangular-shaped C4 contacts are arranged along a surface of the semiconductor chip in an orientation that extends radially from a center of the surface of the semiconductor chip.

Abstract: Methods for making, and structures so made for producing integrated circuit (IC) chip packages without forming micro solder balls. In one embodiment, a method may include placing a solid grid made from an organic material between the IC chip and the substrate. The grid provides a physical barrier between each of a plurality of Controlled Collapse Chip Connections, and thereby prevents the formation of micro solder balls between them, thus improving chip performance and reliability.

Abstract: A method of attaching an integrated circuit chip to a module and a resultant structure. The method includes placing a solder bump tape between the chip and the module, the solder bump tape including an array of solder columns embedded in a dielectric sheet; aligning and contacting top surfaces of solder columns with respective chip pads of an array of chip pads of the chip and aligning and contacting bottom surfaces of the solder columns with respective module pads of an array of module pads; and reflowing the solder columns to form solder interconnections between chip pads and respective module pads.