Abstract: The present invention is a valve cleaning apparatus and method for transporting a cleaning fluid from a supply tank into the air intake valves of a combustion engine. It comprises housing having a pair of legs and a closed end. The housing has a flow path through the housing. A valve is located collinear with the flowpath. The valve cleaning apparatus also includes tubing, a nozzle and a hook to hang the assembly from the hood of a car.

Abstract: A communication system is provided for interconnecting a network of digital systems. Each node of the communication system may include a transceiver and an encoder/decoder. The encoder codes an incoming data stream and forwards the encoded data stream across a communication link based on a DC-adaptive encoding mechanism. The encoded data stream is substantially free of a DC value that would skew the detector components at the receiver end of the communication link. Moreover, the encoded signal is forwarded at no greater than the incoming bitstream. Encoding occurs dependent on a digital sum value of the preceding clock cycle (DSVn−1) for the encoded bitstream and the logic values for the incoming bitstream during the current clock cycle n as well as the subsequent clock cycle n+1. Encoding according to normal encoding or multiple-ones encoding is dependent on those values.

Abstract: A steerable optical arrangement. The inventive arrangement includes a first prism mounted for rotation about an optical axis and a second prism mounted for rotation about the optical axis. In accordance with the inventive teachings, the first prism and/or the second prism have at least one surface contoured to correct for optical aberration. In the illustrative embodiment, the first and second prisms are Risley prisms. In addition, the illustrative implementation includes a first motor arrangement for rotating the first prism about the optical axis and a second motor arrangement for rotating the second prism about the optical axis. A controller is provided for activating the first and second motors to steer the beam at an angle &phgr; and nod the beam at an angle &thgr;. At least two surfaces at least one prism is contoured to correct for astigmatism, coma, trefoil and other non-rotationally symmetric aberration.

Abstract: A missile seeker. The inventive missile seeker includes a dome within which a novel optical arrangement is retained. The optical arrangement includes a first prism mounted for rotation about an optical axis and a second prism mounted for rotation about the optical axis. In the illustrative embodiment, the first and second prisms are Risley prisms. In addition, the illustrative implementation includes a first motor arrangement for rotating the first prism about the optical axis and a second motor arrangement for rotating the second prism about the optical axis. A controller is provided for activating the first and second motors to steer the beam at an angle &phgr; and nod the beam at an angle &thgr;. In a specific implementation, the first prism and/or the second prism have at least two surfaces contoured to correct for optical aberration. A teaching is provided to contour the surfaces to correct for astigmatism, coma, trefoil and other non-rotationally symettric abberation.

Abstract: An apparatus and method for clocking digital and analog circuits on a common substrate is provided. The apparatus and method serves to reduce digitally derived noise at select times during which the analog input signal is sampled. Analog sampling error is thereby reduced while, at the same time, the digital clocking signal maintains maximum frequency. Digitally derived noise is substantially eliminated near the latter portion of each sampling interval to ensure an accurate sampled value exists at the culmination of that interval. During the earlier portion of each sampling interval, digital clocking pulses are maintained at a high frequency so as to enhance processing speeds. It is determined that only the latter portion of each sample interval is critical to the reduction of sampling error. Furthermore, the digital clocking pulses occur a non-power-of-two factor to ensure tonal noise is not coupled into the analog circuit frequency band of interest.

Abstract: An apparatus is provided for automatically and dynamically adjusting a frequency division factor of a clock divider situated in the feedback loop of a phase-locked loop (PLL). The frequency division factor is modified based on changes in the input signal frequency forwarded to the PLL. If the input signal frequency increases, the decision circuit coupled to the input of the voltage controlled oscillator records that change as an encoded digital signal. That signal will accordingly modify the current frequency division factor dependent on current division factor as well as the current input signal frequency. The decision circuit can be modeled as an A/D converter, and the control unit placed between the decision circuit and the clock divider can be modeled as a state diagram. Each state of the state diagram is indicative of a frequency division factor, or a change in that division factor, wherein the coded digital signal indicates possible change from one state to another.

Abstract: A circuit is provided for controlling or regulating a phase-locked loop (PLL) output during times when the PLL is unlocked. Noise or corruption on the input signal of the PLL may cause the PLL output frequency to suddenly rise to match the input signal frequency. In many instances, the noise or corruption cannot be filtered by the low pass filter within the PLL. A detection circuit is coupled to receive the input signal, and discern times in which non-filterable noise occurs. The detection circuit may include a decoder which decodes, e.g., error correction coding within the input signal data stream to indicate possible instances in which the PLL will unlock. Once the detection circuit indicates an unlock condition and forwards an unlock selection signal to a multiplexer, the multiplexer chooses a frequency divided clocking signal rather than the PLL output clocking signal.

Abstract: Two embodiments of a digital signal processor are described. Each embodiment is configured with an instruction processing pipeline including an execute-write pipeline stage. When an instruction reaches the execute-write pipeline stage, the instruction is executed and the corresponding result is written to the specified destination. Additionally, the execute-write stage maintains a relatively short pipeline. One embodiment described herein employs an instruction set in which the destination of an instruction may be encoded within a subsequent instruction. The number of bits utilized to encode a particular instruction is reduced by the number of bits that would have specified the destination.

Abstract: A microemulsion cleaning composition comprising four principle components are described. These four components are a terpene alcohol, an ether carboxylate surfactant, a aliphatic glycol ether cosolvent, and water. The cleaning composition may be used in a liquid form or an aerosol form. The composition is also included as an integral component of a cleaning kit.

Abstract: A method for automatically controlling a nominal property value of a material in the process of making the material, The method includes the steps of providing a feedback model of the process and eliminating the influence of time delay on determining the nominal property value, A state observer is used to estimate at least one unmeasurable variable of the process as a function of at least one measurable variable of the process. The above steps are combined to control the nominal property value as a function of a process variable that is both measurable and undelayed. An actual feedback measurement containing a time delay can be used to correct for any errors that might exist in the feedback estimate.

Abstract: Method for reducing deleterious effects of electrical noise in an analog-to-digital converter wherein both the analog and digital circuitry of the A/D converter are embodied in the same integrated circuit. The method includes sampling an analog input voltage with a first clock signal, generating a second clock signal that is delayed with respect to the first clock signal, and using the second clock signal as a clock for the digital circuitry. In accordance with another aspect of the invention, the method for reducing effects of noise in an A/D converter wherein such noise is generated by a digital decimation filter includes synchronously pipelining the arithmetic operations of the digital decimation filter.

Abstract: An integrated process for automatically controlling the position of solidification of molten metal in the bite of rotating rolls of roll casting apparatus, the gauge of solid metal exiting the apparatus, and compensation for eccentricity in the rolls of the apparatus. The process includes a series of measuring steps that provide values indicative of solidification position, exit gauge and the frequency of roll eccentricity. The solidification position and gauge values are separately compared to reference values established for the position and gauge, with corrections being made respectively to the speed and casting gap of the rolls when differences occur between the measured and reference values. While such measuring and correcting steps are being performed the measured frequency of eccentricity is being employed to cyclically change the roll gap to offset the effects of eccentricity on the gauge of metal exiting the mill.

Abstract: An apparatus for controlling liquid level, comprising containment means for containing and dispensing liquid, flow varying means operable for varying flow of liquid into the containment means, stepper motor means for operating the flow varying means, sensor means for sensing level of liquid in the containment means, and PDD controller means connected between the sensor means and the stepper motor means for controlling liquid level.