Abstract: A computer processor includes an on-chip network and a plurality of tiles. Each tile includes an input circuit to receive a voltage signal from the network, and a crossbar array, including at least one neuron. The neuron includes first and second bit lines, a programmable resistor connecting the voltage signal to the first bit line, and a comparator to receive inputs from the two bit lines and to output a voltage, when a bypass condition is not active. Each tile includes a programming circuit to set a resistance value of the resistor, a pass-through circuit to provide the voltage signal to an input circuit of a first additional tile, when a pass-through condition is active, a bypass circuit to provide values of the bit lines to a second additional tile, when the bypass condition is active; and at least one output circuit to provide an output signal to the network.

Abstract: A computer processor includes an on-chip network and a plurality of tiles. Each tile includes an input circuit to receive a voltage signal from the network, and a crossbar array, including at least one neuron. The neuron includes first and second bit lines, a programmable resistor connecting the voltage signal to the first bit line, and a comparator to receive inputs from the two bit lines and to output a voltage, when a bypass condition is not active. Each tile includes a programming circuit to set a resistance value of the resistor, a pass-through circuit to provide the voltage signal to an input circuit of a first additional tile, when a pass-through condition is active, a bypass circuit to provide values of the bit lines to a second additional tile, when the bypass condition is active; and at least one output circuit to provide an output signal to the network.

Abstract: A computer processor includes an on-chip network and a plurality of tiles. Each tile includes an input circuit to receive a voltage signal from the network, and a crossbar array, including at least one neuron. The neuron includes first and second bit lines, a programmable resistor connecting the voltage signal to the first bit line, and a comparator to receive inputs from the two bit lines and to output a voltage, when a bypass condition is not active. Each tile includes a programming circuit to set a resistance value of the resistor, a pass-through circuit to provide the voltage signal to an input circuit of a first additional tile, when a pass-through condition is active, a bypass circuit to provide values of the bit lines to a second additional tile, when the bypass condition is active; and at least one output circuit to provide an output signal to the network.

Abstract: Method of making an organic flexible integrated circuit includes providing a rigid substrate, such as a silicon wafer, and providing alternating layers of thin film conductors and dielectrics to thus yield interconnect layers including a flexible substrate on the rigid substrate to yield a high density interconnect. Further, the method includes fabricating an organic transistor, and connecting the organic transistor to the high density interconnect to form an organic integrated circuit including the flexible substrate. Then, the rigid substrate and the flexible substrate may be attached to a support. The integrated circuit attached to the rigid and flexible substrates may be tested prior to this attachment. Then the rigid substrate may be removed from the flexible substrate, such as by a destructive. The integrated circuit may be tested gain at this point. The organic integrated circuit may then be released from the support to yield a flexible integrated circuit.

Abstract: Method of making a bumped thinned circuit wafer includes providing a silicon circuit wafer, and providing a conductive layer on it. Then, a first temporary support, such as a handle wafer, may be attached by an acrylic bond. The circuit wafer may then be thinned to a desired thickness, and the thinned circuit attached to a second temporary support, such as a transfer wafer. The handle wafer is removed, the thinned circuit wafer is bumped, and further processing steps may be carried out while the bumped thinned circuit wafer is still attached to the transfer wafer. When the desired processing steps are complete, the transfer wafer is removed, and the thinned circuit wafer with relatively thick solder bumps results.

Abstract: A method of thinning a product wafer using equipment designed for a wafer diameter, where the diameter of the product wafer is smaller than the wafer diameter of the thinning equipment by cutting an opening in a template wafer, where the template wafer is of a diameter that may be thinned by the thinning equipment, and where the opening accommodates the product wafer; affixing the template wafer to a holding material; affixing the product wafer to the holding material and inside of the template wafer with the integrated circuit side up; depositing an etch stop onto a handle wafer, where the handle wafer is at least as large as the template wafer; bonding adhesively the product wafer to the etch stop; removing the holding material; filling any gaps between the product wafer and the template wafer; using wax to make the product wafer sufficiently planar; thinning the product wafer using the thinning equipment; removing any excess wax; bonding adhesively the product wafer to a transfer wafer, where the transfer