Abstract: A printing system wherein a first print driver utilizes an Intelligent Printer Data Stream (IPDS) to send a first job at a first font resolution to a printer and a second job at a second font resolution or a second job utilizing a non-IPDS data stream to the printer. A second print driver also utilizing the IPDS data stream is connected to the same printer for sending a third job. By sending a "Manage IPDS Dialog (MID)" IPDS command to the printer upon conclusion of the first job, the printer is enabled to switch immediately to the second job. The printer is enabled to switch between the first and second print drivers by use of the MID command at the conclusion of a print job.

Abstract: A CMOS microprocessor chip includes an on-chip single-poly EPROM that is process compatible with the CMOS process used to manufacture the microprocessor. The EPROM is used to store manufacturing and contract related data such as serial number, customer, and process related data such as wafer number test results, binning data, etc. This provides important information for quality and reliability control. The EPROM is also used to control selection of optional microprocessor features such as speed governing, pin-out and I/O bus interface configuration. A third use is for trimming of critical circuit elements and for cache redundancy fault control.

Abstract: A method and apparatus for fast electronic self-destruction of a CMOS integrated circuit. The present invention electrically destroys devices containing semiconductor components, securing the components from inspection by detecting the initiation of an attempt to inspect the component and, responsive thereto, electrically destroying the component. In some embodiments of the present invention, a switcheable pad having a destruct state and an operating state is connected to a well or to the substrate of the semiconductor device. When in destruct state, the switcheable pad drives the voltage of the well or substrate to a voltage that induces latch-up of the semiconductor device, allowing very large currents to flow through active or passive elements fabricated on the surface of the semiconductor device.

Abstract: A CMOS microprocessor chip includes an on-chip single-poly EPROM that is process-compatible with the CMOS process used to manufacture the microprocessor. The EPROM is used to store manufacturing and contract related data such as serial number, customer, and process related data such as wafer number test results, binning data, etc. This provides important information for quality and reliability control. The EPROM is also used to control selection of optional microprocessor features such as speed governing, pin-out and I/O bus interface configuration. A third use is for trimming of critical circuit elements and for cache redundancy fault control.

Abstract: Apparatus for reducing the operating voltage for an integrated circuit. The integrated circuit includes a first input conductor coupled to an operating voltage and a second input conductor coupled to system ground. A logic circuit having a positive rail and a negative rail is coupled between the first input conductor and the second input conductor such that the positive rail is coupled to the first input conductor via a first impedance and the negative rail is coupled to the second input conductor via a second impedance. A first sense conductor is connected to said positive rail between said first impedance and said logic circuit for sensing the voltage at the positive rail. In this manner, the potential at the positive rail of the logic device is accurately sensed. The integrated circuit may be incorporated in a remote sensing system wherein a remote sense conductor of the power supply is coupled to sense the potential at the positive rail.