Abstract: A boat entry assistance system for use with small, manual or paddle or oar powered watercraft (such as canoes and kayaks) is provided with guide rails on either side of a boat positioning unit, such as a boat lift, which can be utilized by a boater to propel his watercraft into the unit. The system includes a specially designed bench system which assists disabled persons with entering and exiting such small watercraft.

Abstract: A boat entry assistance system for use with small, manual or paddle or oar powered watercraft (such as canoes and kayaks) is provided with guide rails on either side of a boat positioning unit, such as a boat lift, which can be utilized by a boater to propel his watercraft into the unit. The system includes a specially designed bench system which assists disabled persons with entering and exiting such small watercraft.

Abstract: A boatlift for use with small, manual or paddle or oar powered watercraft (such as canoes and kayaks) is provided with a guide rails on either side of the boat lift, which can be utilized by a boater to propel or urge his/her watercraft onto the boatlift. In addition, that boatlift is provided with an entrance/exit assist member which can be used by boaters with impaired leg function to enter and exit from the watercraft. The boatlift can be provided with a bench system which enables disabled persons to more easily enter and exit from small watercraft supported by the boatlift.

Abstract: A boatlift for use with small, manual or paddle or oar powered watercraft (such as canoes and kayaks) is provided with a guide rails on either side of the boat lift, which can be utilized by a boater to propel or urge his/her watercraft onto the boatlift. In addition, that boatlift is provided with an entrance/exit assist member which can be used by boaters with impaired leg function to enter and exit from the watercraft. The boatlift can be provided with a bench system which enables disabled persons to more easily enter and exit from small watercraft supported by the boatlift.

Abstract: A method of printing an image on a wafer. The method includes the steps of printing a main image, wherein the main image includes fields which are fully on the wafer, and printing an alternate image, wherein the alternate image includes fields which are only partially on the wafer. The alternate image could be placed on a separate mask which is loaded onto the exposure tool after the mask with the main image has completed printing. Alternatively, it could be an extra image specially inserted on the mask with the main image for that layer.

Abstract: A boatlift for use with small, manual or paddle or oar powered watercraft (such as canoes and kayaks) is provided with a guide rails on either side of the boat lift, which can be utilized by a boater to propel or urge his/her watercraft onto the boatlift. In addition, that boatlift is provided with an entrance/exit assist member which can be used by boaters with impaired leg function to enter and exit from the watercraft.

Abstract: A graphical profile map for integrated circuits on a substrate. The graphical profile map includes a depiction of die placement boundaries and shot placement boundaries for the integrated circuits on the substrate. Also included are integrated circuit property information contours, where the contours are not limited to either of the die placement boundaries or the shot placement boundaries. In this manner, three key pieces of information for the integrated circuits are presented, including integrated circuit property information, die placement, and shot placement. Because these three pieces of information are presented in a graphical form, it is much easier to interpret the information. For example, it is much easier to determine which shot and die placements have properties that are at risk, and which shot and die placements have adequate property profiles.

Abstract: A boatlift for use with small, manual or paddle or oar powered watercraft (such as canoes and kayaks) is provided with a guide rails on either side of the boat lift, which can be utilized by a boater to propel or urge his/her watercraft onto the boatlift. In addition, that boatlift is provided with an entrance/exit assist member which can be used by boaters with impaired leg function to enter and exit from the watercraft. The boatlift can be provided with a bench system which enables disabled persons to more easily enter and exit from small watercraft supported by the boatlift.

Abstract: A boatlift for use with small, manual or paddle or oar powered watercraft (such as canoes and kayaks) is provided with a guide rails on either side of the boat lift, which can be utilized by a boater to propel or urge his/her watercraft onto the boatlift. In addition, that boatlift is provided with an entrance/exit assist member which can be used by boaters with impaired leg function to enter and exit from the watercraft.

Abstract: A method of fabricating integrated circuits according to a first design. One first pattern is common with a second design, and one second pattern is unique to the first design. The first pattern is imaged using a first mask having first patterns formed in a block thereon. No other patterns of the first and second designs are formed on the first mask. The second patterns are imaged on the substrate using a second mask having second patterns formed in a block thereon. At least one third layer pattern is formed on the second mask.

Abstract: A method of fabricating integrated circuits according to a first design. One first pattern is common with a second design, and one second pattern is unique to the first design. The first pattern is imaged using a first mask having first patterns formed in a block thereon. No other patterns of the first and second designs are formed on the first mask. The second patterns are imaged on the substrate using a second mask having second patterns formed in a block thereon. At least one third layer pattern is formed on the second mask.

Abstract: A graphical profile map for integrated circuits on a substrate. The graphical profile map includes a depiction of die placement boundaries and shot placement boundaries for the integrated circuits on the substrate. Also included are integrated circuit property information contours, where the contours are not limited to either of the die placement boundaries or the shot placement boundaries. In this manner, three key pieces of information for the integrated circuits are presented, including integrated circuit property information, die placement, and shot placement. Because these three pieces of information are presented in a graphical form, it is much easier to interpret the information. For example, it is much easier to determine which shot and die placements have properties that are at risk, and which shot and die placements have adequate property profiles.

Abstract: A graphical profile map for integrated circuits on a substrate. The graphical profile map includes a depiction of die placement boundaries and shot placement boundaries for the integrated circuits on the substrate. Also included are integrated circuit property information contours, where the contours are not limited to either of the die placement boundaries or the shot placement boundaries. In this manner, three key pieces of information for the integrated circuits are presented, including integrated circuit property information, die placement, and shot placement. Because these three pieces of information are presented in a graphical form, it is much easier to interpret the information. For example, it is much easier to determine which shot and die placements have properties that are at risk, and which shot and die placements have adequate property profiles.

Abstract: A method of fabricating integrated circuits according to a first design by imaging a first layer on a substrate using a first mask having a block of first patterns in common with a second design, but without any other patterns of the first or second designs and imaging a second layer on the substrate using a second mask having a block of second patterns unique to the first design and at least one third layer pattern. The block of first patterns is repeatedly exposed in a first grid and the block of second patterns is repeatedly exposed in a second grid, each without overlap in the corresponding layer. The grids are aligned such that the integrated circuits and test structures in scribe lines between the integrated circuits are properly formed on the substrate. The first patterns can be for large fields and the second patterns can be for small fields.

Abstract: A method of fabricating a plurality of integrated circuits on a substrate according to a first integrated circuit design. Each of the integrated circuits is formed with a plurality of layer patterns. At least one first layer pattern of the layer patterns is common with a second integrated circuit design, and at least one second layer pattern of the layer patterns is unique to the first integrated circuit design. The first layer pattern is imaged on the substrate using an exposure tool and a first mask having a first number of the first layer patterns formed in a block thereon. No other layer patterns of the first layer patterns and the second layer patterns are formed on the first mask. The first number is less than the plurality of integrated circuits formed on the substrate. The first layer patterns are imaged on the substrate by exposing and repeating the block of first number of first layer patterns across the substrate with the exposure tool.