Patents by Inventor David J. WHELIHAN

David J. WHELIHAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8792786
    Abstract: Data locality constraints are alleviated by a data processing system and method of reorganizing data. Multiple electronic components are configured to modulate a light beam on a shared photonic interconnect and to detect the data according to a global schedule to reorganize data across the multiple electronic components. By constructing data transfer patterns in a shared photonic interconnect, rather than in dedicated reorganization hardware, data is reorganized while in transit, greatly accelerating the reorganization of data, and reducing the amount of power-consuming hardware necessary to achieve the task.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: July 29, 2014
    Assignee: Massachusetts Institute of Technology
    Inventors: David J. Whelihan, Scott M. Sawyer, Jeffrey J. Hughes
  • Publication number: 20130243429
    Abstract: Data locality constraints are alleviated by a data processing system and method of reorganizing data. Multiple electronic components are configured to modulate a light beam on a shared photonic interconnect and to detect the data according to a global schedule to reorganize data across the multiple electronic components. By constructing data transfer patterns in a shared photonic interconnect, rather than in dedicated reorganization hardware, data is reorganized while in transit, greatly accelerating the reorganization of data, and reducing the amount of power-consuming hardware necessary to achieve the task.
    Type: Application
    Filed: May 22, 2012
    Publication date: September 19, 2013
    Applicant: Massachusetts Institute of Technology
    Inventors: David J. Whelihan, Scott M. Sawyer, Jeffrey J. Hughes
  • Publication number: 20110154062
    Abstract: A method of designing an electronic system is provided to protect the electronic system from unauthorized access and hardware piracy. The method includes describing the electronic system in a first design and replacing a portion of the electronic system with a reconfigurable module to generate a second design. The reconfigurable module includes a reconfigurable logic block and a configuration block for storing configuration data. The method also includes encrypting configuration data and saving the encrypted configuration data separately from the reconfigurable module. The reconfigurable logic block is configured to correspond to the portion of the electronic system in the first design when the configuration data is loaded in the configuration block.
    Type: Application
    Filed: October 13, 2010
    Publication date: June 23, 2011
    Inventors: David J. WHELIHAN, Paul BRADLEY, Kumar DWARAKANATH
  • Publication number: 20110145919
    Abstract: In exemplary embodiments, methods and apparatuses for securing electronic devices against tampering or unauthorized modifications are presented herein. One or more system locks may be installed in the system at a location between two or more subsystems along a communications path. Each system lock may be associated with a particular subsystem. The system locks may monitor the state of the system, including transactions targeting associated subsystems, and the transactions and/or state of the system may be compared to known valid transactions and states. If the requested transaction or enacted system state differs from a known acceptable transaction or state, a notification may be generated and countermeasures may be enacted. In some embodiments, the system locks may be located in a system bus on an electronic device to ensure that software executed on the electronic device remains free of tampering.
    Type: Application
    Filed: October 13, 2010
    Publication date: June 16, 2011
    Applicant: DAFCA, INC.
    Inventors: David J. WHELIHAN, Paul BRADLEY
  • Publication number: 20110145934
    Abstract: Methods and apparatuses are described herein for securing a mission logic system using one or more distributed, independent programmable security logic blocks. The security logic blocks may monitor subsystems of the mission logic system and/or communication between subsystems. If the security logic blocks determine that the mission logic system is operating in an unauthorized manner, the security logic blocks may enforce a protection mechanism. The security logic blocks may include an interface for receiving communications from the subsystems, an analysis instrument for analyzing the communications, a transport instrument for routing communications from the interface to the analysis instrument, and a control instrument for enforcing the protection mechanism on the basis on an analysis performed by the analysis instrument.
    Type: Application
    Filed: October 13, 2010
    Publication date: June 16, 2011
    Inventors: Miron ABRAMOVICI, Paul BRADLEY, David J. WHELIHAN