Patents by Inventor DAVID JAMES DOUGHERTY
DAVID JAMES DOUGHERTY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250075357Abstract: Lead oxide particles are produced in a ball mill or Barton pot-type process from a lead product formed by an electrolytic process that continuously generates metallic lead. The lead product may be in form of lead flakes, spongy lead, or a nano- and/or microcrystalline lead matrix that is directly obtained from the electrolytic process, optionally washed, and may be compressed before being fed to the ball mill or Barton pot-type process. Notably, thusly produced lead oxide particles have desirable purity and size distribution, despite the presence of residual aqueous solution from the electrolytic process that produced the feedstock for the ball mill or Barton pot.Type: ApplicationFiled: January 21, 2022Publication date: March 6, 2025Applicant: Aqua Metals Inc.Inventors: Brian James Dougherty, Samaresh Mohanta, Benjamin Sol Taecker, David Regan
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Patent number: 12087671Abstract: Overmolded microelectronic packages containing knurled base flanges are provided, as are methods for producing the same. In various embodiments, the overmolded microelectronic package includes a molded package body, at least one microelectronic device contained in the molded package body, and a base flange to which the molded package body is bonded. The base flange includes, in turn, a flange frontside contacted by the molded package body, a device attachment region located on the flange frontside and to which the at least one microelectronic is mounted, and a knurled surface region. The knurled surface region includes a first plurality of trenches formed in the base flange and arranged in a first repeating geometric pattern. The molded package body extends or projects into the first plurality of trenches to decrease the likelihood of delamination of the molded package body from the base flange.Type: GrantFiled: March 26, 2021Date of Patent: September 10, 2024Assignee: NXP USA, Inc.Inventors: Audel Sanchez, Jerry Lynn White, Hamdan Ismail, Frank Danaher, David James Dougherty, Aruna Manoharan
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Patent number: 11621673Abstract: Embodiments of Doherty Power Amplifier (PA) and other PA packages are provided, as are systems including PA packages. In embodiments, the PA package includes a package body having a longitudinal axis, a first group of input-side leads projecting from a first side of the package body and having an intra-group lead spacing, and a first group of output-side leads projecting from a second side of the package body and also having the intra-group lead spacing. A first carrier input lead projects from the first package body side and is spaced from the first group of input-side leads by an input-side isolation gap, which has a width exceeding the intra-group lead spacing. Similarly, a first carrier output lead projects from the second package body side, is laterally aligned with the first carrier input lead, and is separated from the first group of output-side leads by an output-side isolation gap.Type: GrantFiled: March 26, 2020Date of Patent: April 4, 2023Assignee: NXP USA, Inc.Inventors: Jean-Christophe Nanan, David James Dougherty, Scott Duncan Marshall, Lakshminarayan Viswanathan, Xavier Hue
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Patent number: 11196390Abstract: Power amplifier devices and methods for fabricating power amplifier devices containing frontside heat extraction structures are disclosed. In embodiments, the power amplifier device includes a substrate, a radio frequency (RF) power die bonded to a die support surface of the substrate, and a frontside heat extraction structure further attached to the die support surface. The frontside heat extraction structure includes, in turn, a transistor-overlay portion in direct thermal contact with a frontside of the RF power die, a first heatsink coupling portion thermally coupled to a heatsink region of the substrate, and a primary heat extraction path extending from the transistor-overlay portion to the first heatsink coupling portion. The primary heat extraction path promotes conductive heat transfer from the RF power die to the heatsink region and reduce local temperatures within a transistor channel of the RF power die during operation of the power amplifier device.Type: GrantFiled: April 23, 2020Date of Patent: December 7, 2021Assignee: NXP USA, Inc.Inventors: Edward Christian Mares, Lakshminarayan Viswanathan, David James Dougherty
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Publication number: 20210336585Abstract: Power amplifier devices and methods for fabricating power amplifier devices containing frontside heat extraction structures are disclosed. In embodiments, the power amplifier device includes a substrate, a radio frequency (RF) power die bonded to a die support surface of the substrate, and a frontside heat extraction structure further attached to the die support surface. The frontside heat extraction structure includes, in turn, a transistor-overlay portion in direct thermal contact with a frontside of the RF power die, a first heatsink coupling portion thermally coupled to a heatsink region of the substrate, and a primary heat extraction path extending from the transistor-overlay portion to the first heatsink coupling portion. The primary heat extraction path promotes conductive heat transfer from the RF power die to the heatsink region and reduce local temperatures within a transistor channel of the RF power die during operation of the power amplifier device.Type: ApplicationFiled: April 23, 2020Publication date: October 28, 2021Inventors: Edward Christian Mares, Lakshminarayan Viswanathan, David James Dougherty
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Patent number: 11128268Abstract: Power amplifier (PA) packages containing peripherally-encapsulated dies are provided, as are methods for fabricating such PA packages. In embodiments, a method for fabricating a PA package includes obtaining a die-substrate assembly containing a radio frequency (RF) power die, a package substrate, and a die bond layer. The die bond layer is composed of at least one metallic constituent and electrically couples a backside of the RF power die to the package substrate. A peripheral encapsulant body is formed around the RF power die and covers at least a portion of the die bond layer, while leaving at least a majority of a frontside of the RF power die uncovered. Before or after forming the peripheral encapsulant body, terminals of the PA package are interconnected with the RF power die; and a cover piece is bonded to the die-substrate assembly to enclose a gas-containing cavity within the PA package.Type: GrantFiled: May 28, 2020Date of Patent: September 21, 2021Assignee: NXP USA, Inc.Inventors: Sharan Kishore, Jaynal A. Molla, Lakshminarayan Viswanathan, Tianwei Sun, David James Dougherty
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Publication number: 20210217685Abstract: Overmolded microelectronic packages containing knurled base flanges are provided, as are methods for producing the same. In various embodiments, the overmolded microelectronic package includes a molded package body, at least one microelectronic device contained in the molded package body, and a base flange to which the molded package body is bonded. The base flange includes, in turn, a flange frontside contacted by the molded package body, a device attachment region located on the flange frontside and to which the at least one microelectronic is mounted, and a knurled surface region. The knurled surface region includes a first plurality of trenches formed in the base flange and arranged in a first repeating geometric pattern. The molded package body extends or projects into the first plurality of trenches to decrease the likelihood of delamination of the molded package body from the base flange.Type: ApplicationFiled: March 26, 2021Publication date: July 15, 2021Applicant: NXP USA, INC.Inventors: AUDEL SANCHEZ, JERRY LYNN WHITE, HAMDAN ISMAIL, FRANK DANAHER, DAVID JAMES DOUGHERTY, ARUNA MANOHARAN
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Patent number: 10998255Abstract: Overmolded microelectronic packages containing knurled base flanges are provided, as are methods for producing the same. In various embodiments, the overmolded microelectronic package includes a molded package body, at least one microelectronic device contained in the molded package body, and a base flange to which the molded package body is bonded. The base flange includes, in turn, a flange frontside contacted by the molded package body, a device attachment region located on the flange frontside and to which the at least one microelectronic is mounted, and a knurled surface region. The knurled surface region includes a first plurality of trenches formed in the base flange and arranged in a first repeating geometric pattern. The molded package body extends or projects into the first plurality of trenches to decrease the likelihood of delamination of the molded package body from the base flange.Type: GrantFiled: July 12, 2018Date of Patent: May 4, 2021Assignee: NXP USA, Inc.Inventors: Audel Sanchez, Jerry Lynn White, Hamdan Ismail, Frank Danaher, David James Dougherty, Aruna Manoharan
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Publication number: 20200328721Abstract: Embodiments of Doherty Power Amplifier (PA) and other PA packages are provided, as are systems including PA packages. In embodiments, the PA package includes a package body having a longitudinal axis, a first group of input-side leads projecting from a first side of the package body and having an intra-group lead spacing, and a first group of output-side leads projecting from a second side of the package body and also having the intra-group lead spacing. A first carrier input lead projects from the first package body side and is spaced from the first group of input-side leads by an input-side isolation gap, which has a width exceeding the intra-group lead spacing. Similarly, a first carrier output lead projects from the second package body side, is laterally aligned with the first carrier input lead, and is separated from the first group of output-side leads by an output-side isolation gap.Type: ApplicationFiled: March 26, 2020Publication date: October 15, 2020Inventors: Jean-Christophe Nanan, David James Dougherty, Scott Duncan Marshall, Lakshminarayan Viswanathan, Xavier Hue
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Publication number: 20200020614Abstract: Overmolded microelectronic packages containing knurled base flanges are provided, as are methods for producing the same. In various embodiments, the overmolded microelectronic package includes a molded package body, at least one microelectronic device contained in the molded package body, and a base flange to which the molded package body is bonded. The base flange includes, in turn, a flange frontside contacted by the molded package body, a device attachment region located on the flange frontside and to which the at least one microelectronic is mounted, and a knurled surface region. The knurled surface region includes a first plurality of trenches formed in the base flange and arranged in a first repeating geometric pattern. The molded package body extends or projects into the first plurality of trenches to decrease the likelihood of delamination of the molded package body from the base flange.Type: ApplicationFiled: July 12, 2018Publication date: January 16, 2020Applicant: NXP USA, INC.Inventors: AUDEL SANCHEZ, JERRY LYNN WHITE, HAMDAN ISMAIL, FRANK DANAHER, DAVID JAMES DOUGHERTY, ARUNA MANOHARAN