Abstract: Digital data processing circuitry is described that uses combinatorial logic hardware and sequential logic hardware to process one or more inputs. For each input a periodic sequence is generated that is based at least in part on a value of the input and a weight value. A match is determined at an event time when the periodic sequence(s) matches a corresponding arbitrary reference pattern. The digital data processing circuitry may be implemented as an integrated circuit as part of an interconnected network of devices that may be trained and subsequently used for recognition or other complex data processing tasks.