Abstract: An apparatus and methods for testing a semiconductor integrated circuit are disclosed. One embodiment includes a method for making a pass/fail determination in a semiconductor integrated circuit device. The method includes executing a test on the device after assembly and determining a pass/fail state of the device in response to the test. The method further includes programming a test history fuse on the semiconductor integrated circuit device to store a pass/fail state of the device. Another embodiment further includes performing a final test on the device, wherein if the stored pass/fail state indicates a pass state, a reduced final test is executed. A semiconductor integrated circuit device including internal circuitry, self test circuitry, and test history fuse circuitry is also disclosed.