Abstract: An interposer includes an upper surface for coupling to a chip, a lower surface for coupling to a package substrate, and redistribution layers between the upper surface and the lower surface and including routed conductive lines. A respective one of the routed conductive lines extend between a first location and a second location and includes two or more traces extending substantially in parallel between the first location and the second location. Related devices and methods are also described.

Abstract: Apparatuses may include a device substrate including a microelectronic device and bond pads proximate to an active surface of the device substrate. A package substrate may be secured to the device substrate, the package substrate configured to route signals to and from the bond pads. A ball grid array may be supported on, and electrically connected to, the package substrate. Each ball positioned and configured to carry a high-bandwidth data signal or a high-frequency clock signal may be located laterally or longitudinally adjacent to no more than one other ball of the ball grid array configured to carry a high-bandwidth data signal or a high-frequency clock signal. Each ball positioned and configured to carry a high-bandwidth data signal may be located only diagonally adjacent to any other balls configured to carry a high-bandwidth data signal or a high-frequency clock signal.

Abstract: Apparatuses may include a device substrate including a microelectronic device and bond pads proximate to an active surface of the device substrate. A package substrate may be secured to the device substrate, the package substrate configured to route signals to and from the bond pads. A ball grid array may be supported on, and electrically connected to, the package substrate. Each ball positioned and configured to carry a high-bandwidth data signal or a high-frequency clock signal may be located laterally or longitudinally adjacent to no more than one other ball of the ball grid array configured to carry a high-bandwidth data signal or a high-frequency clock signal. Each ball positioned and configured to carry a high-bandwidth data signal may be located only diagonally adjacent to any other balls configured to carry a high-bandwidth data signal or a high-frequency clock signal.

Abstract: Methods, systems, and devices for crosstalk cancellation for signal lines are described. In some examples, a device (e.g., a host device or a memory device) may generate a first signal and may invert the first signal to obtain an inverted first signal. The device may obtain a second signal based on attenuating a first range of frequencies of the inverted first signal and a second range of frequencies of the inverted first signal, where the first range of frequencies is below a first threshold frequency and the second range of frequencies is above a second threshold frequency that is greater than the first threshold frequency. The device may transmit the first signal via a first signal line of a set of signal lines and the second signal line via a second signal line of the set of signal lines.

Abstract: Apparatuses may include a device substrate including a microelectronic device and bond pads proximate to an active surface of the device substrate. A package substrate may be secured to the device substrate, the package substrate configured to route signals to and from the bond pads. A ball grid array may be supported on, and electrically connected to, the package substrate. Each ball positioned and configured to carry a high-bandwidth data signal or a high-frequency clock signal may be located laterally or longitudinally adjacent to no more than one other ball of the ball grid array configured to carry a high-bandwidth data signal or a high-frequency clock signal. Each ball positioned and configured to carry a high-bandwidth data signal may be located only diagonally adjacent to any other balls configured to carry a high-bandwidth data signal or a high-frequency clock signal.

Abstract: Digital memory devices and systems, including memory systems and methods for operating such memory systems are disclosed. In the embodiments, a memory system may include a processor and a memory controller communicatively coupled to the processor. A memory bus communicates with at least two memory units through the memory bus. At least one divider unit may be interposed between the memory bus and the at least two memory units that is configured to approximately equally divide levels of received signals while matching an impedance of the memory bus to an impedance of the memory units.

Abstract: The present invention provides backscatter interrogators, communication systems and backscatter communication methods. According to one aspect of the present invention, a backscatter interrogator includes a data path configured to communicate a data signal; a signal generator configured to generate a carrier signal; and a modulator coupled with the data path and the signal generator, the modulator being configured to spread the data signal to define a spread data signal and amplitude modulate the carrier signal using the spread data signal, the modulator being further configured to phase modulate the carrier signal.

Abstract: The present invention provides backscatter interrogators, communication systems and backscatter communication methods. According to one aspect of the present invention, a backscatter interrogator includes a data path configured to communicate a data signal; a signal generator configured to generate a carrier signal; and a modulator coupled with the data path and the signal generator, the modulator being configured to spread the data signal to define a spread data signal and amplitude modulate the carrier signal using the spread data signal, the modulator being further configured to phase modulate the carrier signal.

Abstract: The present invention provides backscatter interrogators, communication systems and backscatter communication methods. According to one aspect of the present invention, a backscatter interrogator includes a data path configured to communicate a data signal; a signal generator configured to generate a carrier signal; and a modulator coupled with the data path and the signal generator, the modulator being configured to spread the data signal to define a spread data signal and amplitude modulate the carrier signal using the spread data signal, the modulator being further configured to phase modulate the carrier signal.

Abstract: Digital memory devices and systems, including memory systems and methods for operating such memory systems are disclosed. In the embodiments, a memory system may include a processor and a memory controller communicatively coupled to the processor. A memory bus communicates with at least two memory units through the memory bus. At least one divider unit may be interposed between the memory bus and the at least two memory units that is configured to approximately equally divide levels of received signals while matching an impedance of the memory bus to an impedance of the memory units.

Abstract: A radio frequency identification device includes an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Abstract: The present invention relates to wireless communication systems, interrogators and methods of communicating within a wireless communication system. One aspect of the present invention provides a wireless communication system including at least one remote communication device configured to communicate a return link wireless signal; an interrogator including: a communication station configured to receive the return link wireless signal and to generate a return link communication signal corresponding to the return link wireless signal; communication circuitry coupled with the communication station and configured to communicate the return link communication signal; and a housing remotely located with respect to the communication station and including circuitry configured to receive the return link communication signal from the communication circuitry and to process the return link communication signal.

Abstract: Aspects of a communication system include phase shifters, interrogators, methods of shifting a phase angle of a signal, and methods of operating an interrogator. One example provides a phase shifter that include a first power divider configured to receive a signal and provide plural quadrature components of the signal; plural mixers coupled with the first power divider and configured to scale the quadrature components using a phase shift angle; and a second power divider coupled with the mixers and configured to combine the scaled quadrature components to shift the phase angle of the input signal by the phase shift angle.

Abstract: A radio frequency identification (RFID) device includes an antenna linked to a receiving circuit, the antenna tuned to receive a radio frequency (RF) time-code signal from a public source, a controller circuit and an internal clock linked to the receiving circuit, a microcontroller linked to the receiving circuit, a memory linked to the microcontroller, and a battery linked to and powering the receiving circuit, controller circuit, internal clock, microcontroller and memory.

Abstract: Digital memory devices and systems, including memory systems and methods for operating such memory systems are disclosed. In the embodiments, a memory system may include a processor and a memory controller communicatively coupled to the processor. A memory bus communicates with at least two memory units through the memory bus. At least one divider unit may be interposed between the memory bus and the at least two memory units that is configured to approximately equally divide levels of received signals while matching an impedance of the memory bus to an impedance of the memory units.

Abstract: A wireless communication system includes an interrogator including a housing including circuitry configured to generate a forward link communication signal; communication circuitry configured to communicate the forward link communication signal; and a communication station remotely located with respect to the housing and configured to receive the forward link communication signal from the communication circuitry and to radiate a forward link wireless signal corresponding to the forward link communication signal; and at least one remote communication device configured to receive the forward link wireless signal.

Abstract: A wireless communication system includes an interrogator including a housing including circuitry configured to generate a forward link communication signal; communication circuitry configured to communicate the forward link communication signal; and a communication station remotely located with respect to the housing and configured to receive the forward link communication signal from the communication circuitry and to radiate a forward link wireless signal corresponding to the forward link communication signal; and at least one remote communication device configured to receive the forward link wireless signal.

Abstract: Digital memory devices and systems, including memory systems and methods for operating such memory systems are disclosed. In the embodiments, a memory system may include a processor and a memory controller communicatively coupled to the processor. A memory bus communicates with at least two memory units through the memory bus. At least one divider unit may be interposed between the memory bus and the at least two memory units that is configured to approximately equally divide levels of received signals while matching an impedance of the memory bus to an impedance of the memory units.

Abstract: The present invention includes backscatter communication systems, interrogators, methods of communicating in a backscatter system, and backscatter communication methods. According to one aspect of the present invention, a backscatter communication system includes an interrogator including a transmitter configured to output a forward link communication and a receiver configured to receive a return link communication having a carrier signal, the receiver being configured to reduce the amplitude of the carrier signal of the return link communication; and a communication device configured to modulate the carrier signal to communicate the return link communication responsive to reception of the forward link communication.

Abstract: The present invention includes backscatter communication systems, interrogators, methods of communicating in a backscatter system, and backscatter communication methods. According to one aspect of the present invention, a backscatter communication system includes an interrogator including a transmitter configured to output a forward link communication and a receiver configured to receive a return link communication having a carrier signal, the receiver being configured to reduce the amplitude of the carrier signal of the return link communication; and a communication device configured to modulate the carrier signal to communicate the return link communication responsive to reception of the forward link communication.