Patents by Inventor David K. Watts

David K. Watts has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110119908
    Abstract: An electrical contact method. An axle having an axis of rotation is provided. Cantilever arms are provided. Each cantilever arm has a first end and a second opposing end. The first end is connected to the axle. Each cantilever arm extends radially outward from the axle about perpendicular to the axis of rotation. At least two electrically conductive contacts is provided. At least one electrically conductive contact of the at least two electrically conductive contacts is disposed on the second end of each cantilever arm. A sample is supported on a support member. The electrically conductive contacts are pressed against a first surface of the sample. After the electrically conductive contacts are pressed, the electrically conductive contacts are revolved about the axis of rotation, wherein the at least one electrically conductive contact remains in electrical contact with the first surface.
    Type: Application
    Filed: February 1, 2011
    Publication date: May 26, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rui Fang, Deepak Kulkarni, David K. Watts
  • Patent number: 7883395
    Abstract: Methods and structures. A planarization method includes: providing a contact structure, where the contact structure includes an axle configured to rotate about an axis of rotation, a plurality of cantilever arms, each arm having a first end connected to the axle, where each arm extends radially outward from the axle; and a plurality of electrically conductive spheres, where at least one sphere is disposed on a second end of each arm; placing a substrate in contact with the spheres, applying an electric voltage to the axle, where the voltage transfers to the substrate, where responsive to the transfer an electrochemical reaction occurs on the substrate; rotating the axle, wherein the spheres revolve about the axis, wherein at least one sphere remains in electrical contact with the substrate; and electrochemical-mechanically planarizing the substrate. Also included is a contact structure, an electrical contact, and an electrical contact method.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: February 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Rui Fang, Deepak Kulkarni, David K. Watts
  • Patent number: 7820051
    Abstract: A method, process and system for the recycling of electrochemical-mechanical planarization slurries/electrolytes as they are used in the back end of line of the semiconductor wafer manufacturing process is disclosed. The method, process and system includes with the removal of metal ions from slurries using ion exchange media and/or electrochemical deposition.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: October 26, 2010
    Assignee: International Business Machines Corporation
    Inventors: Rui Fang, Deepak Kulkarni, David K. Watts
  • Patent number: 7807036
    Abstract: A method and system for pad conditioning in an electrochemical mechanical planarization (eCMP) tool is disclosed. A polishing pad having a pad electrode is placed onto a platen of the eCMP tool. A conditioning disk, having a second electrode is placed on the polishing pad, such that the pad electrode and conditioning disk form an electrode pair. An electric potential is established between the conditioning disk and the pad electrode. This causes debris from the polishing pad to become ionized, and attracted to the conditioning disk. The conditioning disk is then removed from the eCMP tool, allowing the eCMP tool to resume operation on normal semiconductor wafers.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: October 5, 2010
    Assignee: International Business Machines Corporation
    Inventors: Rui Fang, Deepak Kulkarni, David K Watts
  • Patent number: 7544609
    Abstract: A method for integrating cap liner formation in back-end-of-line (BEOL) processing of a semiconductor device includes forming a trench structure within an insulating layer of the semiconductor device, depositing a first liner material over a top surface of the insulating layer, including sidewall and bottom surfaces of the trench, and partially filling the trench with a wiring metal material to a height corresponding to a final intended line height. A second liner material is over the wiring metal material, and a sacrificial fill material is formed over the second liner material. The sacrificial fill is planarized down to the level of the second liner material over the wiring metal material partially filling the trench, wherein a remaining portion of the second liner material defines a cap liner of the wiring metal.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: June 9, 2009
    Assignee: International Business Machines Corporation
    Inventors: Matthew S. Angyal, Habib Hichri, Christopher J. Penny, David K. Watts
  • Publication number: 20090142994
    Abstract: Methods and structures. A planarization method includes: providing a contact structure, where the contact structure includes an axle configured to rotate about an axis of rotation, a plurality of cantilever arms, each arm having a first end connected to the axle, where each arm extends radially outward from the axle; and a plurality of electrically conductive spheres, where at least one sphere is disposed on a second end of each arm; placing a substrate in contact with the spheres, applying an electric voltage to the axle, where the voltage transfers to the substrate, where responsive to the transfer an electrochemical reaction occurs on the substrate; rotating the axle, wherein the spheres revolve about the axis, wherein at least one sphere remains in electrical contact with the substrate; and electrochemical-mechanically planarizing the substrate. Also included is a contact structure, an electrical contact, and an electrical contact method.
    Type: Application
    Filed: November 29, 2007
    Publication date: June 4, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rui Fang, Deepak Kulkarni, David K. Watts
  • Publication number: 20080233724
    Abstract: A method, process and system for the recycling of electrochemical-mechanical planarization slurries/electrolytes as they are used in the back end of line of the semiconductor wafer manufacturing process is disclosed. The method, process and system includes with the removal of metal ions from slurries using ion exchange media and/or electrochemical deposition.
    Type: Application
    Filed: February 23, 2007
    Publication date: September 25, 2008
    Applicant: International Business Machines Corporation
    Inventors: Rui Fang, Deepak Kulkarni, David K. Watts
  • Publication number: 20080194099
    Abstract: A method for integrating cap liner formation in back-end-of-line (BEOL) processing of a semiconductor device includes forming a trench structure within an insulating layer of the semiconductor device, depositing a first liner material over a top surface of the insulating layer, including sidewall and bottom surfaces of the trench, and partially filling the trench with a wiring metal material to a height corresponding to a final intended line height. A second liner material is over the wiring metal material, and a sacrificial fill material is formed over the second liner material. The sacrificial fill is planarized down to the level of the second liner material over the wiring metal material partially filling the trench, wherein a remaining portion of the second liner material defines a cap liner of the wiring metal.
    Type: Application
    Filed: February 9, 2007
    Publication date: August 14, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew S. Angyal, Habib Hichri, Christopher J. Penny, David K. Watts
  • Publication number: 20080182490
    Abstract: A method and system for pad conditioning in an electrochemical mechanical planarization (eCMP) tool is disclosed. A polishing pad having a pad electrode is placed onto a platen of the eCMP tool. A conditioning disk, having a second electrode is placed on the polishing pad, such that the pad electrode and conditioning disk form an electrode pair. An electric potential is established between the conditioning disk and the pad electrode. This causes debris from the polishing pad to become ionized, and attracted to the conditioning disk. The conditioning disk is then removed from the eCMP tool, allowing the eCMP tool to resume operation on normal semiconductor wafers.
    Type: Application
    Filed: January 31, 2007
    Publication date: July 31, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rui Fang, Deepak Kulkarni, David K. Watts
  • Patent number: 6372111
    Abstract: A method and apparatus is disclosed for reclaiming a metal from the effluent of a chemical mechanical planarization (CMP) process and using the reclaimed metal in an electroplating process. The steps of the method include using a chemical solution in a CMP process to remove material from a semiconductor device. An effluent is produced by this step that contains a dissolved first species removed from the semiconductor device. Then a second step of treating the effluent is performed to remove the dissolved first species and to produce a reclaimed metal. Then a third step of using the metal in an electroplating process is performed.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: April 16, 2002
    Inventor: David K. Watts
  • Patent number: 6362103
    Abstract: A method and apparatus is disclosed for rejuvenating a chemical solution used in a first chemical mechanical planarization (CMP) process for reuse in a second CMP process. The steps of the method include using the chemical solution in the first process to remove material from a semiconductor device. An effluent is produced by this step that contains a dissolved first species removed from the semiconductor device. Then a second step of treating the effluent is performed to remove the dissolved first species to produce a rejuvenated chemical solution.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: March 26, 2002
    Inventor: David K. Watts
  • Patent number: 6096652
    Abstract: A method of CMP of the semiconductor device where the method comprises the sequential steps of providing a semiconductor device, forming a copper layer on the semiconductor device and planarizing the copper layer with a medium. The medium comprises an abrasive component and a chemical solution. The chemical solution comprises water, an oxidizing agent, a first coordinating ligand adapted to form a complex with Cu(I) and a second coordinating ligand adapted to form a complex with Cu(II).
    Type: Grant
    Filed: November 3, 1997
    Date of Patent: August 1, 2000
    Assignee: Motorola, Inc.
    Inventors: David K. Watts, Janos Farkas, Jason Gomez, Chelsea Dang
  • Patent number: 6071816
    Abstract: A method of chemical mechanical planarization of a semiconductor device provides a semiconductor device having a device front surface and a device back surface with the device front surface being a top surface of a second metal layer. A first planarizing step planarizes the device front surface with a first medium to expose a device second front surface, where the first medium comprises a first abrasive component and a first chemical solution. A rinsing step then rinses the device back surface with water. A second planarizing step then planarizes the device second front surface with a second medium where the second medium comprises a second abrasive component and a second chemical solution.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: June 6, 2000
    Assignee: Motorola, Inc.
    Inventors: David K. Watts, Rajeev Bajaj, Sanjit K. Das
  • Patent number: 6045435
    Abstract: A method for polishing a metal layer (20) containing a combination of wide features (12), low density features (14), and high density features (18), is illustrated. A hydrophilic polish pad (24) having a shore D hardness of greater than 50 is used along with slurry (22) containing silica and an acidic based oxidizer such as oxadic acid in a chemical mechanical polishing (CMP) process. The result is less than 5:1 and preferably 1:1. This low selectivity results in the metal layer (20) being polished to a level below the surface of the surrounding oxide in a timed-controlled polish.
    Type: Grant
    Filed: August 4, 1997
    Date of Patent: April 4, 2000
    Assignee: Motorola, Inc.
    Inventors: Rajeev Bajaj, Subramoney Iyer, Thom Kobayashi, Jaime Saravia, Mark Fernandes, David K. Watts
  • Patent number: 6001730
    Abstract: A method for forming a copper interconnect on an integrated circuit (IC) begins by forming a dielectric layer (20) having an opening. A tantalum-based barrier layer (21), such as TaN or TaSiN, is formed within the opening in the layer (20). A copper layer (22) is formed over the barrier layer (21). A first CMP process is used to polish the copper (22) to expose portions of the barrier (21). A second CMP process which is different from the first CMP process is then used to polish exposed portions of the layer (21) faster than the dielectric layer (20) or the copper layer (22). After this two-step CMP process, a copper interconnect having a tantalum-based barrier is formed across the integrated circuit substrate (12).
    Type: Grant
    Filed: October 20, 1997
    Date of Patent: December 14, 1999
    Assignee: Motorola, Inc.
    Inventors: Janos Farkas, Rajeev Bajaj, Melissa Freeman, David K. Watts, Sanjit Das
  • Patent number: 5985748
    Abstract: A method of chemical-mechanical polishing of a semiconductor device utilizes a combination of polishing steps, including a first step using a first slurry containing an abrasive component (i.e., mechanical component) and a chemical component (i.e., chemical reactants), and a second polishing step using a second slurry having a reduced amount of the abrasive component. The method is carried out with respect to metal (39), such as copper, deposited on a dielectric layer (34) and the first polishing step is stopped before the entirety of the metal overlying the dielectric layer is removed. In one embodiment, the second slurry has no abrasive component.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: November 16, 1999
    Assignee: Motorola, Inc.
    Inventors: David K. Watts, Franklin D. Nkansah, John Mendonca