Abstract: A radio frequency (RF) switch (40) for use in a wireless communication system operated in a time delay division mode of operation. The switch includes a pair of PIN diodes (54 and 56) serially coupled between the transmitter and receiver paths of the communication system which share a common node (58) to which a bias voltage is provided. The bias voltage is switched between first and second voltage levels to alternately cause one and the other of the pin diodes to be forward biased while the other is reversed bias. In this manner the transmitter and receiver paths will be alternately shorted to alternating current ground while the other path is shorted to a common node to an antenna.

Abstract: A differential to single-ended converter which combines a pair of applied differential signals of a given frequency applied into a single-ended signal supplied to an output thereof, including capacitive means (14,16 or 36) coupled across a pair of terminals to which the differential signals are applied and transmission line circuitry (18, or 38, 40) coupled across the capacitive means for shifting the phase of one of the differential signals applied to one of the pair of terminals such that it is in phase with the other one of the differential signals applied at the other of the pair of terminals wherein said signals are combined into a single-ended signal and applied to an output of the converter.

Abstract: A circuit (30) and method for translating a spectrum of a modulated signal. The circuit (30) includes a mixer (33), a summing device (36), and a synthesizer (37). The circuit (30) receives and transmits modulated Radio Frequency (RF) signals. The synthesizer (37) generates a transmitter modulated RF signal (TX.sub.RF) using a modulating signal (TX.sub.MOD). The mixer (33) generates an intermediate frequency signal (IF) by mixing a receiver modulated RF signal (RX.sub.RF) with the transmitter modulated RF signal (TX.sub.RF). The summing device (36) removes modulation of the transmitter modulated RF signal (TX.sub.RF) by combining the intermediate frequency signal (IF) with the modulating signal (TX.sub.MOD).

Abstract: An image reject receiver (10) uses a mixer circuit (12) and a mixer circuit (16) to frequency translate an incoming reference signal (RF.sub.IN) and generate a first output signal (V.sub.OUT1) and a second output signal (V.sub.OUT2), respectively. Two phase detectors (26 and 36) measure a phase difference between the first and second output signals (V.sub.OUT1, and V.sub.OUT2) and a difference circuit (30) provides a difference value in accordance with the phase difference. The difference value cancels any phase shift due to time delays associated with the phase detectors (26 and 36). The difference value is fed back to a phase shift circuit (20) for adjusting the phase of the second output signal (V.sub.OUT2) and locking the first output signal (V.sub.OUT1) in-phase with the second output signal (V.sub.OUT2).

Abstract: An image reject transceiver (10) provides both phase and gain adjustments that causes unwanted images to be rejected. A reference signal (RF.sub.IN) is frequency translated by two mixer circuits (28, 34) in a receiver circuit (16) to provide both an in-phase and an out-of-phase replica signal of the reference signal (RF.sub.IN) during normal operation. In a calibration mode a single frequency generated by a transmitter VCO (22) replaces the reference signal (RF.sub.IN). A phase detector circuit (38) provides a phase difference value that is fed back through a first switch (45) to a phase shift circuit (36) for adjusting the phase separation between the two replica signals. An amplitude detector circuit (40) provides an amplitude error value that is fed back through a second switch (47) to the mixer circuit (34) for adjusting and matching the gain of the two replica signals.

Abstract: An integrated transceiver circuit (10) includes a single side-band mixer (12) and a phase locked loop (30). The phase locked loop (30) includes a phase detector (32) coupled to a voltage controlled oscillator (36) via a summing circuit (33) and a low pass filter (34). A feedback signal from the voltage controlled oscillator (36) is transferred to the phase detector (32) through a counter (38). Either a phase modulation signal or a frequency modulation signal are inputs of summing circuit (33) and modulate the transmitter carrier signal generated by the voltage controlled oscillator (36). The carrier signal generated at an output terminal (40) of the transmitter tracks the frequency of the local oscillator signal that is supplied at an input terminal of the single side-band mixer (12) in the receiver.