Abstract: Electronic and optical (or photonic) devices with variable or switchable properties and methods used to form these devices, are disclosed. More specifically, the present invention involves forming layers of conductive material and dielectric material or materials with varying conductivity and indexes of refraction to form various electronic and optical devices. One such layer of adjustable material is formed by depositing epitaxial or reduced grain boundary barium strontium titanate on the C-plane of sapphire.

Abstract: Capacitor material for use in forming capacitors, is disclosed. More specifically, the invention is directed to capacitors formed from this material that have one or more discrete electrodes (314), each electrode (314) being exposed to at least two thicknesses of dielectric material (300). These electrodes (314) are surrounded by wider insulative material (312) such that the material can be cut, or patterned into capacitors having specific values. A single electrode can form a small value capacitor while still providing a larger conductive area for attaching the capacitor to associated circuitry. The thin dielectric (310) can be a tunable material so that the capacitance can be varied with voltage. The tunability can be increased by adding thin electrodes that interact with direct current.

Abstract: Capacitor material for use in forming capacitors, is disclosed. More specifically, the invention is directed to capacitors formed from this material that have one or more discrete electrodes (314), each electrode (314) being exposed to at least two thicknesses of dielectric material (300). These electrodes (314) are surrounded by wider insulative material (312) such that the material can be cut, or patterned into capacitors having specific values. A single electrode can form a small value capacitor while still providing a larger conductive area for attaching the capacitor to associated circuitry. The thin dielectric (310) can be a tunable material so that the capacitance can be varied with voltage. The tunability can be increased by adding thin electrodes that interact with direct current.

Abstract: Electronic and optical (or photonic) devices with variable or switchable properties and methods used to form these devices, are disclosed. More specifically, the present invention involves forming layers of conductive material and dielectric material or materials with varying conductivity and indexes of refraction to form various electronic and optical devices. One such layer of adjustable material is formed by depositing epitaxial or reduced grain boundary barium strontium titanate on the C-plane of sapphire.

Abstract: A low power push pull off chip driver for differential cascode current circuitry is described that includes the collectors of a differential pair directly coupled to bases of a push pull driver and level shifters coupled to the input of the differential pair to prevent saturation of the differential pair.

Abstract: A circuit for testing a differential current switching logic circuit of the type including: a bias potential, two resistors connected to the bias potential, and apparatus responsive to an input signal for sinking a first current through a selected one of the resistors so as to generate first and second differential output signals at the resistors. The circuit includes first, second, and third transistors, each having first and second terminals for conducting a current responsive to a signal applied to a control terminal. Apparatus are provided for supplying a current. The first transistor has its first terminal connected to the current supplying means, and its second terminal connected to a circuit node. The second transistor has its first terminal connected to the circuit node, its second terminal connected to the bias potential, and its control terminal connected to sense the potential at a selected one of the resistors.

Abstract: Disclosed is a test system having circuitry for reducing off-chip driver switching (delta I) noise. The test system employs a tester connected to and electrically testing an integrated circuit chip. The integrated circuit chip has a plurality of input terminals for receiving an electrical test pattern from the tester. The integrated circuit chip also includes a plurality of output driver circuits having outputs connected to the tester. The test system is characterized in that the integrated circuit chip includes a driver sequencing network under control of the tester for sequentially conditioning the off-chip driver circuits for possible switching.

Abstract: Integrated circuit logic chips often oscillate during testing because the large unbypassed inductance of the test fixture causes off-chip driver switching noise to be fed back to the logic chip power supply. Oscillation may be prevented by adding an inhibit receiver and an off-chip driver inhibit network to the logic chip. The off-chip driver inhibit network provides a fan out path from the inhibit receiver to each off-chip driver. In response to an inhibit signal applied to the inhibit receiver, the inhibit network forces each of the off-chip drivers to the same logical state, the logic state being the natural logic state assumed by the off-chip drivers upon initial application of power to the chip. The driver inhibit receiver and inhibit network are employed to prevent oscillation at chip power-on, during driver and receiver parametric testing and during input test pattern tests.