Patents by Inventor David Kirk McAllister

David Kirk McAllister has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9607407
    Abstract: A method, in one embodiment, can include performing difference transformation of image samples. In addition, the method can also include performing length selection. Furthermore; the method can include performing packing that includes utilizing varying sized bit fields to produce a compressed representation.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: March 28, 2017
    Assignee: NVIDIA CORPORATION
    Inventors: Jonathan Dunaisky, David Kirk McAllister, William Craig McKnight
  • Patent number: 9530189
    Abstract: A method for compressing framebuffer data is presented. The method includes determining a reduction ratio for framebuffer data in a tile including multiple samples. The reduction ratio determined is independent of the sampling mode, where the sampling mode is the number of samples within each pixel in the tile. The method further includes comparing a first portion of the framebuffer data for each of the multiple samples to determine an equality comparison result and also comparing a second portion of the framebuffer data for each one of the multiple samples to compute per-channel differences for each one of the multiple samples and testing the per-channel differences against a threshold value to determine a threshold comparison result. Finally, the method comprises compressing the framebuffer data for the tile based on the reduction ratio, the equality comparison result and the threshold comparison result to produce output framebuffer data for the tile.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: December 27, 2016
    Assignee: NVIDIA CORPORATION
    Inventors: Jonathan Dunaisky, David Kirk McAllister, Steven E. Molnar, Narayan Kulshrestha, Rui Bastos, Joseph Detmer, William Craig McKnight
  • Patent number: 9406149
    Abstract: A system and method are described for compressing image data using a combination of compression methods. Compression method combinations are provided to compress image data of a particular frame buffer format and antialiasing mode. Each method in the compression method combination is tried in turn to compress the image data in a tile. The best method that succeeded in compressing the image data is encoded in the compression bit state associated with the tile. Together, the compression bits, the compression method combination, and the frame buffer format provide sufficient information to decompress a tile.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: August 2, 2016
    Assignee: NVIDIA Corporation
    Inventors: David Kirk McAllister, Narayan Kulshrestha, Steven E. Molnar
  • Patent number: 8872824
    Abstract: A system, method, and computer program product are provided for performing shadowing utilizing shadow maps and ray tracing. In operation, one or more shadow maps are rendered for at least one light source. Additionally, low confidence pixels associated with the one or more shadow maps are determined. Furthermore, shadow rays associated with the low confidence pixels are traced.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: October 28, 2014
    Assignee: NVIDIA Corporation
    Inventors: Michael Robert Phillips, David Patrick Luebke, Jonathan Michael Cohen, Peter Schuyler Shirley, David Kirk McAllister
  • Patent number: 8862823
    Abstract: One embodiment of the present invention sets forth a compression status cache configured to store compression information for blocks of memory stored within an external memory. A data cache unit is configured to request, in response to a cache miss, compressed data from the external memory based on compression information stored in the compression status bit cache. The compression status for active buffers is dynamically swapped into the compression status cache as needed. Different compression formats may be specified for one or more tiles within an active buffer. One advantage of the disclosed compression status cache is that a lame amount of attached memory may be allocated as compressible memory blocks, without incurring a corresponding die area cost because a portion of the compression status stored off chip in attached memory is cached in the compression status cache.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: October 14, 2014
    Assignee: NVIDIA Corporation
    Inventors: David B. Glasco, Cass W. Everitt, David Kirk Mcallister, Emmett M. Kilgariff, George R. Lynch, James Roberts, Karan Mehra, Patrick R. Marchand, Peter B. Holmqvist, Steven E. Molnar
  • Publication number: 20140184612
    Abstract: A method, in one embodiment, can include performing difference transformation of image samples. In addition, the method can also include performing length selection. Furthermore; the method can include performing packing that includes utilizing varying sized bit fields to produce a compressed representation.
    Type: Application
    Filed: December 31, 2012
    Publication date: July 3, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Jonathan Dunaisky, David Kirk McAllister, Craig McKnight
  • Patent number: 8605104
    Abstract: One embodiment of the present invention sets forth a technique for compressing color data. Color data for a tile including multiple samples is compressed based on an equality comparison and a threshold comparison based on a programmable threshold value. The equality comparison is performed on a first portion of the color data that includes at least exponent and sign fields of floating point format values or high order bits of integer format values. The threshold comparison is performed on a second portion of the color data that includes mantissa fields of floating point format values or low order bits of integer format values. The equality comparison and threshold comparison are used to select either computed averages of the pixel components or the original color data as the output color data for the tile. When the threshold is set to zero, only tiles that can be compressed without loss are compressed.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: December 10, 2013
    Assignee: NVIDIA Corporation
    Inventors: David Kirk McAllister, Steven E. Molnar, Narayan Kulshrestha
  • Publication number: 20130249897
    Abstract: A method for compressing framebuffer data is presented. The method includes determining a reduction ratio for framebuffer data in a tile including multiple samples. The reduction ratio determined is independent of the sampling mode, where the sampling mode is the number of samples within each pixel in the tile. The method further includes comparing a first portion of the framebuffer data for each of the multiple samples to determine an equality comparison result and also comparing a second portion of the framebuffer data for each one of the multiple samples to compute per-channel differences for each one of the multiple samples and testing the per-channel differences against a threshold value to determine a threshold comparison result. Finally, the method comprises compressing the framebuffer data for the tile based on the reduction ratio, the equality comparison result and the threshold comparison result to produce output framebuffer data for the tile.
    Type: Application
    Filed: December 27, 2012
    Publication date: September 26, 2013
    Applicant: NVIDIA CORPORATION
    Inventors: Jonathan Dunaisky, David Kirk McAllister, Steven E. Molnar, Narayan Kulshrestha, Rui Bastos, Joseph Detmer, William Craig McKnight
  • Patent number: 8488890
    Abstract: One embodiment of the present invention sets forth a technique for compressing image data with high contrast between pixels within a tile and between samples within pixels without any data loss. Partial coverage layers are generated and written to a tile that includes multiple pixels without reading the existing image data that is stored for the tile. A partial coverage layer encodes image data, such as colors, and sub-pixel coverage information for each covered pixel in a tile. The use of partial coverage layers reduces the bandwidth used to store image data when a tile is not fully covered.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: July 16, 2013
    Assignee: Nvidia Corporation
    Inventors: David Kirk McAllister, Narayan Kulshrestha, Steven E. Molnar
  • Publication number: 20130033507
    Abstract: A system, method, and computer program product are provided for constructing an acceleration structure. In use, a plurality of primitives associated with a scene is identified. Additionally, an acceleration structure is constructed, utilizing the primitives.
    Type: Application
    Filed: August 4, 2011
    Publication date: February 7, 2013
    Applicant: NVIDIA Corporation
    Inventors: Kirill Vladimirovich Garanzha, Jacopo Pantaleoni, David Kirk McAllister
  • Patent number: 8330766
    Abstract: A system and method for performing zero-bandwidth-clears reduces external memory accesses by a graphics processor when performing clears and subsequent read operations. A set of clear values is stored in the graphics processor. Each region of a color or z buffer may be configured using a zero-bandwidth-clear command to reference a clear value without writing the external memory. The clear value is provided to a requestor without accessing the external memory when a read access is performed.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: December 11, 2012
    Assignee: NVIDIA Corporation
    Inventors: David Kirk McAllister, Steven E. Molnar, Jerome F. Duluk, Jr., Emmett M. Kilgariff, Patrick R. Brown, Christian Johannes Amsinck, James Michael O'Connor, John Matthew Burgess, Gregory Alan Muthler, James Robertson
  • Patent number: 8319783
    Abstract: A system and method for performing zero-bandwidth-clears reduces external memory accesses by a graphics processor when performing clears and subsequent read operations. A set of clear values is stored in the graphics processor. Each portion of a color or z buffer may be configured using a zero-bandwidth-clear command to reference a clear value without writing the external memory. The clear value is provided to a requestor without accessing the external memory when a read access is performed.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: November 27, 2012
    Assignee: NVIDIA Corporation
    Inventors: David Kirk McAllister, Steven E. Molnar, Peter B. Holmqvist, Jerome F. Duluk, Jr., Cass W. Everitt, Emmett M. Kilgariff, Patrick R. Brown, Christian Johannes Amsinck
  • Patent number: 8059131
    Abstract: A tiled graphics memory permits graphics data to be stored in different tile formats. One application is selecting a tile format optimized for the data generated for particular graphical surfaces in different rendering modes. Consequently, the tile format can be selected to optimize memory access efficiency and/or packing efficiency. In one embodiment a first tile format stores pixel data in a format storing two different types of pixel data whereas a second tile format stores one type of pixel data. In one implementation, a z-only tile format is provided to store only z data but no stencil data. At least one other tile format is provided to store both z data and stencil data. In one implementation, z data and stencil data are stored in different portions of a tile to facilitate separate memory accesses of z and stencil data.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: November 15, 2011
    Assignee: NVIDIA Corporation
    Inventors: Donald A. Bittel, David Kirk McAllister, Steven E. Molnar
  • Publication number: 20110243469
    Abstract: A system and method are described for compressing image data using a combination of compression methods. Compression method combinations are provided to compress image data of a particular frame buffer format and antialiasing mode. Each method in the compression method combination is tried in turn to compress the image data in a tile. The best method that succeeded in compressing the image data is encoded in the compression bit state associated with the tile. Together, the compression bits, the compression method combination, and the frame buffer format provide sufficient information to decompress a tile.
    Type: Application
    Filed: October 7, 2010
    Publication date: October 6, 2011
    Inventors: David Kirk McAllister, Narayan Kulshrestha, Steven E. Molnar
  • Patent number: 7847802
    Abstract: A graphics system coalesces Z data and color data for a raster operations stage. The Z data and color data are stored in a memory aligned tile format. In one embodiment, rendering modes in which the tile does not have a data capacity corresponding to Z data or color data for a whole number of pixels have data for at least one pixel split across entries to improve packing efficiency. Rendering modes having a number of bits for Z data or color data that does not equal a power of two such as 24 bits, 48 bits, and 96 bits, may be implemented with a high packing efficiency in tile formats having a data capacity corresponding to a power of 2 bits.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: December 7, 2010
    Assignee: NVIDIA Corporation
    Inventors: Donald A. Bittel, Dorcas T. Hsia, David Kirk McAllister, Jonah M. Alben
  • Patent number: 7474313
    Abstract: A graphics system coalesces Z data and color data for a raster operations stage. The Z data and color data are stored in a memory aligned tile format. In one embodiment, rendering modes in which the tile does not have a data capacity corresponding to Z data or color data for a whole number of pixels have data for at least one pixel split across entries to improve packing efficiency. Rendering modes having a number of bits for Z data or color data that does not equal a power of two such as 24 bits, 48 bits, and 96 bits, may be implemented with a high packing efficiency in tile formats having a data capacity corresponding to a power of 2 bits.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: January 6, 2009
    Assignee: Nvidia Corporation
    Inventors: Donald A. Bittel, Dorcas T. Hsia, David Kirk McAllister, Jonah M. Alben
  • Patent number: 7420568
    Abstract: A tiled graphics memory permits graphics data to be stored in different tile formats. One application is selecting a tile format optimized for the data generated for particular graphical surfaces in different rendering modes. Consequently, the tile format can be selected to optimize memory access efficiency and/or packing efficiency. In one embodiment a first tile format stores pixel data in a format storing two different types of pixel data whereas a second tile format stores one type of pixel data. In one implementation, a z-only tile format is provided to store only z data but no stencil data. At least one other tile format is provided to store both z data and stencil data. In one implementation, z data and stencil data are stored in different portions of a tile to facilitate separate memory accesses of z and stencil data.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: September 2, 2008
    Assignee: Nvidia Corporation
    Inventors: Donald A. Bittel, David Kirk McAllister, Steven E. Molnar