Patents by Inventor David Kotecki

David Kotecki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050196917
    Abstract: A method for forming high capacitance crystalline dielectric layers with (111) texture is disclosed. In an exemplary embodiment, deposition of a plurality of nuclei is performed at a temperature in the range of about 430 to 460 degrees Celsius, followed by growth of a continuous BSTO dielectric layer at a temperature greater than 600 degrees Celsius. In an exemplary embodiment, a process is disclosed for growing a barium strontium titanium oxide film with high capacitance and thickness of about 30 nm or less.
    Type: Application
    Filed: March 3, 2004
    Publication date: September 8, 2005
    Inventors: Jingyu Lian, David Kotecki, Hua Shen, Robert Laibowitz, Katherine Saenger, Chenting Lin, Nicolas Nagel, Yunyu Wang, Satish Athavale, Thomas Shaw
  • Patent number: 6365328
    Abstract: A method for forming an electrode. The method includes forming a conductive plug through a first dielectric layer. The plug extends from an upper surface of the first dielectric layer to a contact region in a semiconductor substrate. The electrode is formed photolithographically, misalignment of a mask registration in the photolithography resulting in exposing surface portions of the barrier contact. A second dielectric layer is deposited over the first dielectric layer, over side portions and top portions of the formed electrode, and over the exposed portions of barrier contact. A sacrificial material is provided on portions of the second dielectric layer disposed on lower sides of the, electrode, on portions of the second dielectric layer disposed on the first dielectric layer, and on said exposed portions of the barrier contact while exposing portions of the second dielectric layer on the top portions and upper side portions of the formed electrode.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: April 2, 2002
    Assignees: Infineon Technologies North America Corp., International Business Machines Corporation
    Inventors: Hua Shen, David Kotecki, Satish Athavale, Jenny Lian, Laertis Economikos, Fen F. Jamin, Gerhard Kunkel, Nirmal Chaudhary
  • Patent number: 6261967
    Abstract: A method for forming a patterned shape from a noble metal, in accordance with the present invention, includes forming a noble metal layer over a dielectric layer and patterning a hard mask layer on the noble metal layer. The hard mask layer includes a mask material that is selectively removable relative to the noble metal layer and the dielectric layer and capable of withstanding plasma etching. Alternately, the hard mask material may be consumable during the noble metal layer plasma etching. Plasma etching is performed on the noble metal layer in accordance with the patterned hard mask layer. The hard mask layer is removed such that a patterned shape formed in the noble metal layer remains intact after the plasma etching and the hard mask removal.
    Type: Grant
    Filed: February 9, 2000
    Date of Patent: July 17, 2001
    Assignees: Infineon Technologies North America Corp., International Business Machine Corporation
    Inventors: Satish D. Athavale, Hua Shen, David Kotecki, Jenny Lian
  • Patent number: 6165864
    Abstract: A method for forming a stacked capacitor includes the steps of providing a first insulating layer having a conductive access path therethrough, forming a second insulating layer on the first insulating layer, forming a trench in the second insulating layer, the trench having tapered sidewalls, forming a first electrode in the trench and on the trench sidewalls, the first electrode being electrically coupled to the conductive access path, forming a dielectric layer on the first electrode and forming a second electrode on the dielectric layer. A stacked capacitor having increased surface area includes a first electrode formed in a trench provided in a dielectric material. The first electrode has tapered surfaces forming a conically shaped portion of the first electrode, the first electrode for accessing a capacitively coupled storage node.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: December 26, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Hua Shen, Joachim Nuetzel, Carl J. Radens, David Kotecki