Abstract: A circuit for use with a PC16550D UART in 16450 polling mode that will filter DR bit oscillations. The circuit latches the value of the Line Status Register during the valid data portion of a LSR register read cycle, deasserts the read strobe, delays to allow the data bus values to float, applies the latched values of the LSR to the data bus, then asserts a ready signal to the microprocessor. If the UART access is not a read cycle to the LSR, the delay time is bypassed and the UART access cycle proceeds normally.

Abstract: A circuit for use with a PC16550D UART in 16450 polling mode that will filter DR bit oscillations. The circuit latches the value of the Line Status Register during the valid data portion of a LSR register read cycle, deasserts the read strobe, delays to allow the data bus values to float, applies the latched values of the LSR to the data bus, then asserts a ready signal to the microprocessor. If the UART access is not a read cycle to the LSR, the delay time is bypassed and the UART access cycle proceeds normally.

Abstract: A car space measurement apparatus for tracking a rail vehicle position on a track is provided, which includes a wayside sensor and a supervisory processor. The wayside sensor senses multiple track parameters that are representative of the rail vehicle position. The supervisory processor receives selected track parameters and determines the rail vehicle position therefrom. Also the supervisory processor asynchronously displays a track position indication representative of the rail vehicle position. The apparatus can have an operational mode, a calibration mode, and a self -test mode. The selected track parameters are analog track phase signals. The supervisory processor can include an analog signal processor, a phase processor for determining the track position indication and a control processor for asynchronously receiving and displaying the track position indication. The asynchronous interface can be a asynchronous computer bus interface.