Patents by Inventor David L. Chapek

David L. Chapek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6165853
    Abstract: A method of forming trench isolated integrated circuitry on a substrate provides a substrate having a first insulating material within and projecting from an isolation trench and a second insulating material laterally proximate the first insulating material. The second insulating material is etched substantially selective relative to the first insulating material to expose substrate beneath the second insulating material. After the etching, a gate dielectric layer is formed over the exposed substrate. A transistor gate is formed over the gate dielectric layer. In but one other implementation, an oxide layer is thermally grown over a semiconductive substrate. An isolation trench is formed through the thermal oxide layer and the semiconductive substrate. Oxide is deposited within the trenches and formed to project outwardly relative to the thermal oxide.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: December 26, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Michael Nuttall, Kevin J. Torek, David L. Chapek
  • Patent number: 6143631
    Abstract: A method for controlling the morphology of deposited silicon on a layer of silicon dioxide and semiconductor devices incorporating such deposited silicon are provided. The method comprises the steps of: providing a layer of silicon dioxide; implanting hydrogen ions into the layer of silicon dioxide by plasma source ion implantation; and forming a layer of polycrystalline silicon on the layer of silicon dioxide.
    Type: Grant
    Filed: May 4, 1998
    Date of Patent: November 7, 2000
    Assignee: Micron Technology, Inc.
    Inventor: David L. Chapek
  • Patent number: 6096660
    Abstract: The present invention relates generally to removing an undesirable second oxide, while minimally affecting a desirable first oxide, on an integrated circuit. The integrated circuit may be part of a larger system.The second oxide is first converted to another material, such as oxynitride. The other material has differing characteristics, such as etching properties, so that it can then be removed, without substantially diminishing the first oxide.The conversion may be accomplished by heating. Heating may be accomplished by rapid thermal or furnace processing. Subsequently, the other material is removed from the integrated circuit, for example by hot phosphoric etching, so that the desirable first oxide is not substantially affected.
    Type: Grant
    Filed: August 21, 1997
    Date of Patent: August 1, 2000
    Assignee: Micron Technology, Inc.
    Inventors: David L. Chapek, John T. Moore
  • Patent number: 6096998
    Abstract: A thermal reflow processing system has a rotatable structure to which articles having a reflowable surface are attached. The structure is coupled to a drive motor which causes the structure to rotate at speeds which generate centripetal forces in excess of that of gravity. The system is equipped with at least one radiant heat source. As the articles are being subjected to a centripetal force, the surface is heated by the radiant heat source. In a preferred embodiment, the structure is a hermetically-sealable chamber which can be pressurized or evacuated. The articles, which may be semiconductor wafers, are positioned on the rotating structure such that the surface to be reflowed faces both the heat source and the structure's rotational axis. In the case of circular semiconductor wafers, the wafers are positioned such that the planar surface of each wafer is centered on and perpendicular to a radius of the cylindrical chamber.
    Type: Grant
    Filed: September 17, 1996
    Date of Patent: August 1, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Karl M. Robinson, David L. Chapek
  • Patent number: 6066576
    Abstract: Field oxide is formed using high pressure. Oxidation of field regions between active regions is accomplished in a two-step process. A first oxide layer is formed in the field region. Then, a second oxide layer is formed on the first oxide layer. The second oxide layer is formed at a pressure of at least approximately 5 atmospheres. In one embodiment, the first oxide layer is formed at atmospheric pressure using a conventional oxidation technique, such as rapid thermal oxidation (RTO), wet oxidation, or dry oxidation. In another embodiment, the first oxide layer is formed at near atmospheric pressure, at a pressure of approximately 1 to 5 atmospheres. Wet or dry oxidation is used for the oxidizing ambient. The first oxide layer is formed to a thickness of approximately 500 angstroms or less, and typically greater than 200 angstroms. Temperatures of approximately 600 to 1,100 degrees Celsius are used for the oxidation steps.
    Type: Grant
    Filed: June 4, 1997
    Date of Patent: May 23, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Randhir P. S. Thakur, David L. Chapek
  • Patent number: 6051480
    Abstract: In etching trench isolation structures, a pad oxide or sacrificial oxide may be formed with substantially the same (or higher) etch rate as the trench filler. Because the etch rate in the trench area is substantially similar to (or less than) the etch rate in the non-trench area, similar amounts of material are removed in both the trench area and non-trench area in a subsequent etching process. Consequently, formation of notches and grooves in the semiconductor structure is minimized. A sacrificial oxide layer may be made by depositing a layer of a suitable material on the surface of a semiconductor structure. By depositing a sacrificial oxide layer instead of thermally growing a sacrificial oxide layer, grooves and the notches in the trench areas are filled by the deposited material.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: April 18, 2000
    Assignee: Micron Technology, Inc.
    Inventors: John T. Moore, David L. Chapek
  • Patent number: 5846888
    Abstract: A desirable impurity, such as reactive gases and inert gases, is safely introduced into a substrate/oxide interface during high pressure thermal oxidation. Desirable impurities include chlorine, fluorine, bromine, iodine, astatine, nitrogen, nitrogen trifluoride, and ammonia. In one embodiment, the desirable impurity is introduced into a processing chamber prior to the high pressure oxidation step. Then, the temperature is brought to or maintained at an oxidation temperature. In another embodiment, the desirable impurity is introduced into the processing chamber after the high pressure oxidation step, while the temperature is still sufficiently high for oxidation. In yet another embodiment, the desirable impurity is introduced into the processing chamber both before and after the high pressure oxidation step.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: December 8, 1998
    Assignee: Micron Technology, Inc.
    Inventors: David L. Chapek, Randhir P. S. Thakur