Patents by Inventor David L. Edwards
David L. Edwards has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6444082Abstract: An apparatus and a method for removing a bonded lid from a substrate of variable size including nesting jaws to support and secure the substrate; and gripping jaws to grip the lid; wherein, in operation, the gripping jaws pivot with respect to the nesting jaws and create a, peeling action which separates the lid from the substrate with minimum force and without damage to the substrate or attached semiconductor devices.Type: GrantFiled: June 22, 2000Date of Patent: September 3, 2002Assignee: International Business Machines CorporationInventors: Barrie C. Campbell, David L. Edwards, Ronald L. Hering, Richard F. Shortt
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Patent number: 6436223Abstract: A fixture and process for assembly of semiconductor modules. Each module comprises a substrate and a cover attached to the substrate. The fixture comprises a baseplate adapted to accept the substrate and a spring-loading device containing a shape memory alloy spring engaging the cover. The shape memory alloy spring exerts a lesser force at room temperature and an elevated force at the bonding temperature of the bonding agent used to attach the cover to the substrate.Type: GrantFiled: February 16, 1999Date of Patent: August 20, 2002Assignee: International Business Machines CorporationInventors: David L. Edwards, Enrique C. Abreu, Ronald L. Hering, David C. Olson
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Patent number: 6373133Abstract: A multi-chip module and heat-sink cap assembly and method of fabrication, which provides sufficient cooling for higher power density chips. The heat-sink cap has heat-sink columns disposed over each chip on a substrate. The heat-sink columns are interconnected by flexible members to provide a unitary cover. Thin film metallization of at least a portion of the mating surfaces of the substrate, chips and heat-sink column permits soldering of the cap to the chips and substrate to form the package which is a mechanically stable structure with no degradation of interconnection fatigue life due to thermal cycling of the assembly when in use.Type: GrantFiled: July 13, 1999Date of Patent: April 16, 2002Assignee: International Business Machines CorporationInventors: Giulio DiGiacomo, Stephen S. Drofitz, Jr., David L. Edwards, Larry D. Gross, Sushumna Iruvanti, Raed A. Sherif, Subhash L. Shinde, David J. Womac, David B. Goland, Lester W. Herron
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Patent number: 6365977Abstract: The present invention relates generally to a new structure and a method for reducing the cost of producing known good die (KGD). More particularly, the invention encompasses a structure and a method that uses a substrate having solder wettable pads, a chip with attached solder balls, and a thin non-conductive interposer that is assembled between the chip and the substrate. The interposer reduces the cross section of the solder connections from the chip to the substrate where the solder passes through (the holes in) the interposer. This reduced cross-sectional area of the solder connection creates a weak point which allows the chip to be easily sheared off of the substrate after a burn-in and test process. The preferred chips for this invention are flip chips.Type: GrantFiled: August 31, 1999Date of Patent: April 2, 2002Assignee: International Business Machines CorporationInventors: David L. Edwards, Norman J. Dauerer, Glenn G. Daves
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Publication number: 20020034888Abstract: The present invention relates generally to a new structure and a method for reducing the cost of producing known good die (KGD). More particularly, the invention encompasses a structure and a method that uses a substrate having solder wettable pads, a chip with attached solder balls, and a thin non-conductive interposer that is assembled between the chip and the substrate. The interposer reduces the cross section of the solder connections from the chip to the substrate where the solder passes through (the holes in) the interposer. This reduced cross-sectional area of the solder connection creates a weak point which allows the chip to be easily sheared off of the substrate after a burn-in and test process. The preferred chips for this invention are flip chips.Type: ApplicationFiled: November 14, 2001Publication date: March 21, 2002Applicant: International Business Machines CorprationInventors: David L. Edwards, Norman J. Dauerer, Glenn G. Daves
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Publication number: 20020017715Abstract: A method and structure for thermally connecting a thermal conductor to at least one chip, the thermal conductor including a lower surface and at least one piston extending from the lower surface corresponding to each of the chips, each of the chips having an upper surface opposing each of the pistons, the chips being mounted on a substrate, the method comprising steps of metalizing the lower surface of the thermal conductor and the pistons, applying a solder to the lower surface of the thermal conductor, applying a thermal paste between the upper surface of the chips and the pistons, positioning the substrate and the thermal conductor such that the substrate is aligned with the thermal conductor, biasing the thermal conductor toward the substrate, biasing the pistons toward the chips such that the thermal paste has a consistent thickness between each of the chips and the pistons, reflowing the solder, such that the solder bonds the substrate to the thermal conductor and the pistons form a metallurgical bond wType: ApplicationFiled: January 12, 2001Publication date: February 14, 2002Inventors: Giulio Di Giacomo, Stephen S. Drofitz, David L. Edwards, Sushumna Iruvanti, David J. Womac
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Patent number: 6294408Abstract: A method and apparatus for electronic chip assembly maintains a thin gap spacing between the chip and the lid or heat sink and provides for the electronic chip to operate at a relatively cool temperature. The thermal performance is enhanced by a thermal interface material provided in the thin gap and maintained at a minimal thickness as a result of the structure and assembly process. A thin thermal interface material layer may be achieved with a compression step to compress the thermal interface material before the sealant is cured. In addition, a vent hole is provided in the assembly to prevent pressure build-up inside the module during sealant cure. As the sealant is cured, the gap spacing is maintained, further compression of the thermal interface material is not required, and seal defects are prevented.Type: GrantFiled: September 30, 1999Date of Patent: September 25, 2001Assignee: International Business Machines CorporationInventors: David L. Edwards, Michael J. Emmett, Sushumna Iruvanti, Raed A. Sherif, Kamal Sikka, Hilton T. Toy
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Patent number: 6292369Abstract: Integrated circuit chip packaging modules and lid structures having improved heat dissipation performance are characterized by a customized lid understructure which enables a reduction in the amount of compliant thermally conductive material in the primary heat dissipation path. The lid structures and modules are made by processes wherein the lid understructure is customized for the chip(s) to be housed. The customization is achieved by the use of shims and a deformable lid understructure.Type: GrantFiled: August 7, 2000Date of Patent: September 18, 2001Assignee: International Business Machines CorporationInventors: Glenn G. Daves, David L. Edwards
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Patent number: 6291267Abstract: A process for underfilling a chip-under-chip module. The module comprises a first larger chip, a second smaller chip attached to the underside of the first chip, a substrate having a top surface to which the first chip is mounted, a cavity into which the second chip fits when the first chip is mounted on the top surface, and an access channel connecting the cavity to the top surface. Underfill is disposed under the first chip between the first chip and the substrate, between the first and second chips, within the cavity, and within the access channel. The process for underfilling such a module comprises the steps of forming the substrate having the cavity and access channel in the substrate, connecting the first chip to the substrate, and dispensing underfill through the access channel.Type: GrantFiled: October 15, 1999Date of Patent: September 18, 2001Assignee: International Business Machines CorporationInventors: Kevin A. Dore, David L. Edwards
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Publication number: 20010014469Abstract: The invention concerns novel hybrid pesticidal toxins. These toxins are expressed as the fusion protein of a chimeric gene. Specifically exemplified is a novel B.t. hybrid toxin. These novel toxins have increased toxicity against target pests. The invention also concerns a process for preparing a hybrid virus having an altered insect host range.Type: ApplicationFiled: January 26, 2000Publication date: August 16, 2001Inventors: Edward R. Wilcox, David L. Edwards, George E. Schwab, Mark Thompson, Paul Culver
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Patent number: 6275381Abstract: The present invention relates generally to a new apparatus and method for introducing thermal paste into semiconductor packages. More particularly, the invention encompasses an apparatus and a method that uses at least one preform of thermal paste for the cooling of at least one chip in a sealed semiconductor package. The thermal paste preform is subcooled, and is transferred onto a module component from a separable transfer sheet, or is placed onto the module component using an attached and/or imbedded mesh. The preform of thermal paste may be of simple or complex shape, and enables cooling of one or more chips in a module.Type: GrantFiled: December 10, 1998Date of Patent: August 14, 2001Assignee: International Business Machines CorporationInventors: David L. Edwards, Glenn G. Daves, Shaji Farooq, Sushumna Iruvanti, Frank L. Pompeo
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Patent number: 6255139Abstract: The present invention relates generally to a new method for improving the reliability of cooling designs using thermal paste to cool chips in semiconductor modules and structure thereof. More particularly, the invention encompasses a structure and a method that uses surface chemistry modification of the inside of the thermal cooling caps where it contacts thermal paste. The internal surface of the cap is modified by embedding particles that have the same chemical composition as one or more of the solids used in the thermal paste. The particles may be embedded in the cap by casting, grit blasting, or pressing the particles permanently into the surface.Type: GrantFiled: August 5, 1999Date of Patent: July 3, 2001Assignee: International Business Machines CorporationInventors: David L. Edwards, Patrick A. Coico, Sushumna Iruvanti, Frank L. Pompeo, Raed A. Sherif, Hilton T. Toy
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Patent number: 6239484Abstract: A chip-under-chip module and a substrate for making the module. The module comprises a first larger chip, a second smaller chip attached to the underside of the first chip, a substrate having a top surface to which the first chip is mounted, a cavity into which the second chip fits when the first chip is mounted on the top surface, and an access channel connecting the cavity to the top surface. Underfill is disposed under the first chip between the first chip and the substrate, between the first and second chips, within the cavity, and within the access channel. A process for manufacture of such a module comprises the steps of forming the substrate having the cavity and access channel in the substrate, connecting the first chip to the substrate, and dispensing underfill through the access channel.Type: GrantFiled: June 9, 1999Date of Patent: May 29, 2001Assignee: International Business Machines CorporationInventors: Kevin A. Dore, David L. Edwards
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Patent number: 6214647Abstract: A method and structure for thermally connecting a thermal conductor to at least one chip, the thermal conductor including a lower surface and at least one piston extending from the lower surface corresponding to each of the chips, each of the chips having an upper surface opposing each of the pistons, the chips being mounted on a substrate, the method comprising steps of metalizing the lower surface of the thermal conductor and the pistons, applying a solder to the lower surface of the thermal conductor, applying a thermal paste between the upper surface of the chips and the pistons, positioning the substrate and the thermal conductor such that the substrate is aligned with the thermal conductor, biasing the thermal conductor toward the substrate, biasing the pistons toward the chips such that the thermal paste has a consistent thickness between each of the chips and the pistons, reflowing the solder, such that the solder bonds the substrate to the thermal conductor and the pistons form a metallurgical bond wType: GrantFiled: September 23, 1998Date of Patent: April 10, 2001Assignee: International Business Machines CorporationInventors: Giulio Di Giacomo, Stephen S. Drofitz, Jr., David L. Edwards, Sushumna Iruvanti, David J. Womac
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Patent number: 6111314Abstract: The present invention relates generally to a new method for improving the reliability of cooling designs using thermal paste to cool chips in semiconductor modules and structure thereof. More particularly, the invention encompasses a structure and a method that uses surface chemistry modification of the inside of the thermal cooling caps where it contacts thermal paste. The internal surface of the cap is modified by embedding particles that have the same chemical composition as one or more of the solids used in the thermal paste. The particles may be embedded in the cap by casting, grit blasting, or pressing the particles permanently into the surface.Type: GrantFiled: August 26, 1998Date of Patent: August 29, 2000Assignee: International Business Machines CorporationInventors: David L. Edwards, Patrick A. Coico, Sushumna Iruvanti, Frank L. Pompeo, Raed A. Sherif, Hilton T. Toy
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Patent number: 6090931Abstract: The invention concerns an in vitro process for altering the insect host range (spectrum) or increasing the toxicity of lepidopteran active B.t. crystal protein toxins. The process comprises recombining in vitro the variable region(s) (non-homologous) of two or more genes encoding lepidopteran active B.t. crystal protein toxins. Specifically exemplified is the recombining of the variable regions of two genes obtained from well-known strains of Bacillus thuringiensis var. kurstaki. The resulting products are chimeric toxins which are shown to have an expanded and/or amplified lepidopteran insect host range as compared to the parent toxins.Type: GrantFiled: May 13, 1997Date of Patent: July 18, 2000Assignee: Mycogen CorporationInventors: David L. Edwards, Corinna Herrnstadt, Edward R. Wilcox, Siu-Yin Wong
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Patent number: 6091603Abstract: Integrated circuit chip packaging modules and lid structures having improved heat dissipation performance are characterized by a customized lid understructure which enables a reduction in the amount of compliant thermally conductive material in the primary heat dissipation path. The lid structures and modules are made by processes wherein the lid understructure is customized for the chip(s) to be housed. The customization is achieved by the use of shims and a deformable lid understructure.Type: GrantFiled: September 30, 1999Date of Patent: July 18, 2000Assignee: International Business Machines CorporationInventors: Glenn G. Daves, David L. Edwards
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Patent number: 6051556Abstract: The invention concerns novel hybrid pesticidal toxins. These toxins are expressed as the fusion protein of a chimeric gene. Specifically exemplified is a novel B.t. hybrid toxin. These novel toxins have increased toxicity against target pests. The invention also concerns a process for preparing a hybrid virus having an altered insect host range.Type: GrantFiled: May 10, 1995Date of Patent: April 18, 2000Assignee: Mycogen CorporationInventors: Edward R. Wilcox, David L. Edwards, George E. Schwab, Mark Thompson, Paul Culver
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Patent number: 5982038Abstract: The present invention relates generally to a new scheme of providing a seal for semi-conductor substrates and chip carriers. More particularly, the invention encompasses a structure and a method that uses a multi-layer metallic seal to provide protection to chips on a chip carrier. This multi-layer metal seal provides both enhanced hermeticity lifetime and environmental protection.For the preferred embodiment the multi-layer metallic seal is a two layer, solder structure which is used to create a low cost, high reliability, hermetic seal for the module. This solder structure has a thick high melting point temperature region that is attached to a cap, and a thin interconnecting region of lower melting point temperature region for sealing the substrate to the cap.Type: GrantFiled: May 1, 1997Date of Patent: November 9, 1999Assignee: International Business Machines CorporationInventors: Hilton T. Toy, Lannie R. Bolde, James H. Covell, II, David L. Edwards, Lewis S. Goldmann, Peter A. Gruber
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Patent number: 5981310Abstract: A multi-chip module and heat-sink cap assembly and method of fabrication, which provides sufficient cooling for higher power density chips. The heat-sink cap has heat-sink columns disposed over each chip on a substrate. The heat-sink columns are interconnected by flexible members to provide a unitary cover. Thin film metallization of at least a portion of the mating surfaces of the substrate, chips and heat-sink column permits soldering of the cap to the chips and substrate to form the package which is a mechanically stable structure with no degradation of interconnection fatigue life due to thermal cycling of the assembly when in use.Type: GrantFiled: January 22, 1998Date of Patent: November 9, 1999Assignee: International Business Machines CorporationInventors: Giulio DiGiacomo, Stephen S. Drofitz, Jr., David L. Edwards, Larry D. Gross, Sushumna Iruvanti, Raed A. Sherif, Subhash L. Shinde, David J. Womac, David B. Goland, Lester W. Herron