Abstract: Input/output (I/O) apparatus for a system is disclosed utilizing a digital processor for entering analog, digital and discrete data into the processor and receiving analog, digital and discrete data from the processor via an I/O data bus. A plurality of analog data signals are applied sequentially to an analog to digital converter via an analog input multiplexer. The resultant digital data are applied in bit parallel fashion to predetermined bits of the I/O data bus reserved for the input and output of analog data. Digital and discrete data is entered with the analog data by shifting the data from each of the digital and discrete data sources in bit parallel fashion into associated shift registers. The contents of the registers are shifted serially into respective predetermined bits of the data bus reserved for the input and output of the digital or discrete data.

Abstract: A signal transformation network which is uniquely characterized to exhibit a very low input impedance while maintaining a linear transfer characteristic when driven from a voltage source and when quiescently biased in the low microampere current range. In its simplest form, it consists of a tightly coupled two-transistor network in which a common emitter input stage is interconnected directly with an emitter follower stage to provide virtually 100 percent negative feedback to the base input of the common emitter stage. Bias to the network is supplied via the common tie point of the common emitter stage collector terminal and the emitter follower base stage terminal by a regulated constant current source, and the output of the circuit is taken from the collector of the emitter follower stage.