Abstract: An encapsulation block for a digital signal processing (DSP) block. The encapsulation block includes DSP block having an input terminal, an output terminal, and an input clock. The encapsulation block also includes pacing control network operatively connected with the input terminal, the output terminal, and the input clock of the DSP block. The input terminal of the DSP block is configured to receive a samples-in data stream inputted at a predefined clock period defined by the input clock. The output terminal of the DSP block is configured to receive a samples-out data stream outputted at a predefined paced parameter. The pacing control network is configured to control data flow at the samples-in data stream and the samples-out data stream independently of the DSP block.

Abstract: Stapling assemblies for use with a surgical stapler are provided. In one exemplary embodiment, the stapling assembly includes a cartridge having a plurality of staples disposed therein and a non-fibrous adjunct formed of at least one fused bioabsorbable polymer and configured to be releasably retained on the cartridge. Adjunct systems for use with a surgical stapler are also provided. Surgical end effectors using the stapling assemblies are also provided. Methods for manufacturing stapling assemblies and using the same are also provided.

Abstract: A security device made up of a security film (130) having (i) an array of image elements (103); (ii) an array of focusing elements (106); and (iii) at least one anti-viscid agent (115), is provided. The array of focusing elements and the array of image elements are disposed relative to each other such that a synthetic image is projected by the security film when at least a portion of the array of image elements are viewed through at least a portion of the array of focusing elements. The anti-viscid agent is coupled with the array of focusing elements.

Abstract: A security device made up of a security film (130) having (i) an array of image elements (103); (ii) an array of focusing elements (106); and (iii) at least one anti-viscid agent (115), is provided. The array of focusing elements and the array of image elements are disposed relative to each other such that a synthetic image is projected by the security film when at least a portion of the array of image elements are viewed through at least a portion of the array of focusing elements. The anti-viscid agent is coupled with the array of focusing elements.

Abstract: The present invention provides a security device having layers or material stacked over each other to provide a color-shifting effect, an indicia effect, optional detection effect, fracking effect and a forensic feature.

Abstract: Presented herein are layered systems, security devices formed from the layered systems and methods of manufacturing those layered systems and security devices. The security devices provide several effects including, but not limited to, (1) color-shifting effects that are observable as the points of view of the observant changes and (2) customizable micro-text formed in the security device by demetallization of a metallic layer provided on or within the security device. The method of manufacturing the security devices includes manufacturing a layered system that is used to form the security devices.

Abstract: A mold apparatus for encapsulating IC chips mounted on a substrate. In an exemplary embodiment a mold is provided with an upper mold platen having a plurality of cavities for encapsulating wire bonds and related interconnections on a first side of a multi-chip carrier substrate. The mold further includes a lower mold platen with a single cavity for encapsulating substantially the entire second chip side of the carrier substrate. Support elements are provided for supporting the multi-chip carrier substrate. The support elements are configured to prevent or minimize substrate deflection during the fill of the mold cavities with encapsulant material. The support elements may be integral to a mold cavity or may be removable. The support elements may further be aligned along lines representing a series of individual device packages. The molded assembly may then be cut along marks left in the encapsulant to define individual device packages.

Abstract: The present invention is directed to a hammer having a number of accessories including a storage cavity adapted to efficiently and conveniently hold tools, supplies, and the like and/or an additional number of accessories. The hammer comprises a hammer head having a front portion adapted for striking a nail or a tack, and a handle having a longitudinal extending cavity therein. A tray tailored to fit and slide within the longitudinal extending cavity is provided and is adapted to support a plurality of accessories.

Abstract: A mold apparatus for encapsulating IC chips mounted on a substrate. In an exemplary embodiment a mold is provided with an upper mold platen having a plurality of cavities for encapsulating wire bonds and related interconnections on a first side of a multi-chip carrier substrate. The mold further includes a lower mold platen with a single cavity for encapsulating substantially the entire second chip side of the carrier substrate. Support elements are provided for supporting the multi-chip carrier substrate. The support elements are configured to prevent or minimize substrate deflection during the fill of the mold cavities with encapsulant material. The support elements may be integral to a mold cavity or may be removable. The support elements may further be aligned along lines representing a series of individual device packages. The molded assembly may then be cut along marks left in the encapsulant to define individual device packages.

Abstract: An encapsulation method enabling high throughput production of semiconductor die packages. In an exemplary embodiment, a mold is provided with an upper mold platen having a plurality of cavities for encapsulating interconnections on a first side of a multi-chip carrier substrate. The mold further includes a lower mold platen having a cavity for encapsulating substantially the entire second side of the carrier substrate, including a plurality IC chips mounted thereon. Substrate support elements, in the form of standoff pins, are provided for supporting the carrier substrate during the encapsulation process to prevent substrate deflection. The standoff pins may be integral to a mold cavity or may be removable. The standoff pins may further be aligned along lines representing individual device package edges. Cutting along marks left in the encapsulant by the support elements provides individual device packages.

Abstract: A method for fabricating a semiconductor package is performed using a mold tooling fixture having a mold cavity and a pair of flash control cavities on either side of the mold cavity. The semiconductor package includes a substrate and a semiconductor die attached to the substrate. The substrate includes a pattern of conductors wire bonded to the die, and an array of solder balls bonded to ball bonding pads on the conductors. In addition, the substrate includes a die encapsulant encapsulating the die, and a wire bond encapsulant encapsulating the wire bonds. During molding of the wire bond encapsulant, the flash control cavities collect flash, and provide pressure relief for venting the mold cavity. In addition, the flash control cavities restrict the flash to a selected area of the package substrate, such that the ball bonding pads and solder balls are not contaminated.

Abstract: An encapsulation method enabling high throughput production of semiconductor die packages. In an exemplary embodiment, a mold is provided with an upper mold platen having a plurality of cavities for encapsulating interconnections on a first side of a multi-chip carrier substrate. The mold further includes a lower mold platen having a cavity for encapsulating substantially the entire second side of the carrier substrate, including a plurality IC chips mounted thereon. Substrate support elements, in the form of standoff pins, are provided for supporting the carrier substrate during the encapsulation process to prevent substrate deflection. The standoff pins may be integral to a mold cavity or may be removable. The standoff pins may further be aligned along lines representing individual device package edges. Cutting along marks left in the encapsulant by the support elements provides individual device packages.

Abstract: The present invention provides an encapsulation method and apparatus that allows high throughput production of reliable, high quality board-on-chip packages, or other semiconductor die packages, from a multi-chip array arrangement on a carrier substrate. In an exemplary embodiment relating to a board-on-chip array, a mold is provided with an upper mold platen and a plurality of upper mold platen cavities for encapsulating wire bonds and related interconnections on a first side of a multi-chip carrier substrate. The mold further includes a lower mold platen and a lower mold platen cavity for encapsulating substantially the entire second side of the carrier substrate, to include a plurality IC chips mounted thereon in array fashion. Substrate support elements, in the form of standoffs pins or bosses, are provided for supporting the multi-chip carrier substrate during the encapsulation process.

Abstract: The present invention provides an encapsulation method and apparatus that allows high throughput production of reliable, high quality board-on-chip packages, or other semiconductor die packages, from a multi-chip array arrangement on a carrier substrate. In an exemplary embodiment relating to a board-on-chip array, a mold is provided with an upper mold platen and a plurality of upper mold platen cavities for encapsulating wire bonds and related interconnections on a first side of a multi-chip carrier substrate. The mold further includes a lower mold platen and a lower mold platen cavity for encapsulating substantially the entire second side of the carrier substrate, to include a plurality IC chips mounted thereon in array fashion. Substrate support elements, in the form of standoff pins or bosses, are provided for supporting the multi-chip carrier substrate during the encapsulation process.

Abstract: A thermoplastic elastomer is provided comprising a branched olefin polymer having crystalline sidechains and an amorphous backbone wherein at least 90 mole percent of the sidechains are isotactic or syndiotactic polypropylene and at least 80 mole percent of the backbone is atactic polypropylene. Additionally, a process is provided for producing a thermoplastic elastomer composition comprising: a) contacting, in solution, at a temperature from about 90° C. to about 120° C., propylene monomers with a catalyst composition comprising a chiral, stereorigid transition metal catalyst compound capable of producing isotactic or syndiotactic polypropylene; b) copolymerizing the product of a) with propylene and, optionally, one or more copolymerizable monomers, in a polymerization reactor using an achiral transition metal catalyst capable of producing atactic polypropylene; and c) recovering a branched olefin polymer.

Abstract: A polyolefin composition is provided which consists essentially of isotactic polypropylene and, optionally, one or more comonomers, wherein the total comonomer content of the polyolefin composition is from 0 to 20 mole percent, and further, wherein the weight average branching index g′ for the lower molecular weight region of the polyolefin composition is less than 0.93. Additionally, a process is provided for producing a polyolefin composition comprising: a) contacting, in solution, at a temperature from about 90° C. to about 120° C.

Abstract: A method for fabricating a semiconductor package is performed using a mold tooling fixture having a mold cavity and a pair of flash control cavities on either side of the mold cavity. The semiconductor package includes a substrate and a semiconductor die attached to the substrate. The substrate includes a pattern of conductors wire bonded to the die, and an array of solder balls bonded to ball bonding pads on the conductors. In addition, the substrate includes a die encapsulant encapsulating the die, and a wire bond encapsulant encapsulating the wire bonds. During molding of the wire bond encapsulant, the flash control cavities collect flash, and provide pressure relief for venting the mold cavity. In addition, the flash control cavities restrict the flash to a selected area of the package substrate, such that the ball bonding pads and solder balls are not contaminated.

Abstract: A polyolefin composition is provided which consists essentially of isotactic polypropylene and, optionally, repeating units of one or more comonomers, wherein the total comonomer repeating unit content of the polyolefin composition is from 0 to 20 mole percent, and further, wherein the weight average branching index g′ for the lower molecular weight region of the polyolefin composition is less than 0.93. Additionally, a process is provided for producing a polyolefin composition comprising: a) contacting, in solution, at a temperature from about 90° C. to about 120° C.

Abstract: A thermoplastic elastomer is provided comprising a branched olefin polymer having crystalline sidechains and an amorphous backbone wherein at least 90 mole percent of the sidechains are isotactic or syndiotactic polypropylene and at least 80 mole percent of the backbone is atactic polypropylene. Additionally, a process is provided for producing a thermoplastic elastomer composition comprising: a) contacting, in solution, at a temperature from about 90° C. to about 120° C., propylene monomers with a catalyst composition comprising a chiral, stereorigid transition metal catalyst compound capable of producing isotactic or syndiotactic polypropylene; b) copolymerizing the product of a) with propylene and, optionally, one or more copolymerizable monomers, in a polymerization reactor using an achiral transition metal catalyst capable of producing atactic polypropylene; and c) recovering a branched olefin polymer.

Abstract: A lightweight and low cost replacement display for a conventional cathode-ray tube (CRT) display is provided that projects distortion free digital images directly without conversion to analog signals. The display does not exhibit cross-talk interference when a plurality of displays are placed adjacent one another, and does not present large gaps between adjacent displays. The display utilizes a digital micromirror device that projects a 1:1 bit mapped digital signal to a plurality of micromirrors that are switchable between an on and an off state and projects the image of light reflected from the "on" mirrors onto a direct view screen.