Patents by Inventor David Lachtrupp

David Lachtrupp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multi-level fuse structure
    Patent number: 6495901
    Abstract: A semiconductor device has a first conductor and a second conductor for fuse terminals. A fuse portion is disposed on a different level relative to both the first conductor and the second conductor. A first contact connects the fuse portion to the first conductor, and a second contact connects the fuse portion to the second conductor.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: December 17, 2002
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Axel Christoph Brintzinger, Chandrasekhar Narayan, David Lachtrupp, Kenneth Arndt
  • Multi-level fuse structure
    Publication number: 20020100956
    Abstract: A semiconductor device has a first conductor and a second conductor for fuse terminals. A fuse portion is disposed on a different level relative to both the first conductor and the second conductor. A first contact connects the fuse portion to the first conductor, and a second contact connects the fuse portion to the second conductor.
    Type: Application
    Filed: January 30, 2001
    Publication date: August 1, 2002
    Inventors: Axel Christoph Brintzinger, Chandrasekhar Narayan, David Lachtrupp, Kenneth Arndt
  • Mixed fuse technologies
    Patent number: 6288436
    Abstract: A plurality of fuses of different types, each type of fuse serving a specific purpose are positioned on a semiconductor integrated circuit wafer, wherein activating one type of fuse does not incapacitate fuses of a different type. Fuses of the first type, e.g., laser activated fuses, are primarily used for repairing defects at the wafer level, whereas fuses of the second type, e.g., electrically activated fuses, are used for repairing defects found after mounting the IC chips on a module and stressing the module at burn-in test. Defects at the module level typically are single cell failures which are cured by the electrically programmed fuses to activate module level redundancies.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: September 11, 2001
    Assignee: International Business Machines Corporation
    Inventors: Chandrasekhar Narayan, Kenneth Arndt, Toshiaki Kirihata, David Lachtrupp, Axel Brintzinger, Gabriel Daniel