Abstract: Dynamic control of memory affinity is provided for a shared memory logical partition within a shared memory partition data processing system having a plurality of nodes. The memory affinity control approach includes: determining one or more home node assignments for the shared memory logical partition, with each assigned home node being one node of the plurality of nodes of the system; determining a desired physical page level per node for the shared memory logical partition; and allowing the shared memory partition to run and using the home node assignment(s) and its desired physical page level(s) in the dispatching of tasks to physical processors in the nodes and in hypervisor page memory management to dynamically control memory affinity of the shared memory logical partition in the data processing system.

Abstract: Relocating data in a virtualized environment maintained by a hypervisor administering access to memory with a Cache Page Table (‘CPT’) and a Physical Page Table (‘PPT’), the CPT and PPT including virtual to physical mappings. Relocating data includes converting the virtual to physical mappings of the CPT to virtual to logical mappings; establishing a Logical Memory Block (‘LMB’) relocation tracker that includes logical addresses of an LMB, source physical addresses of the LMB, target physical addresses of the LMB, a translation block indicator for each relocation granule, and a pin count associated with each relocation granule; establishing a PPT entry tracker including PPT entries corresponding to the LMB to be relocated; relocating the LMB in a number of relocation granules including blocking translations to the relocation granules during relocation; and removing the logical addresses from the LMB relocation tracker.

Abstract: Hypervisor page fault processing logic is provided for a shared memory partition data processing system. The logic, responsive to an executing virtual processor of the shared memory partition data processing system encountering a hypervisor page fault, allocates an input/output (I/O) paging request to the virtual processor from an I/O paging request pool and increments an outstanding I/O paging request count for the virtual processor. A determination is then made whether the outstanding I/O paging request count for the virtual processor is at a predefined threshold, and if not, the logic places the virtual processor in a wait state with interrupt wake-up reasons enabled based on the virtual processor's state, otherwise, it places the virtual processor in a wait state with interrupt wake-up reasons disabled.

Abstract: Operating system-directed workload scheduling of an adjunct partition in a logically partitioned computer is selectively overridden to handle platform work requiring a Quality of Service (QoS) guarantee. Firmware may track outstanding requests for platform work for an adjunct partition, and in response to a request for platform work that requires a QoS guarantee, the firmware may assume or take over scheduling decisions for the adjunct partition from the operating system of an associated logical partition and schedule execution of the adjunct partition to ensure that the adjunct partition will be allocated sufficient execution resources to perform the platform work independent of the scheduling desires of the operating system. As a result, any platform work that potentially impacts the platform work of other adjunct partitions will not be held up as a result of an unwillingness or inability of the operating system to schedule execution of the adjunct partition.

Abstract: A system, method, and computer-usable medium for probing hypervisor tasks in an asynchronous environment. According to an embodiment of the invention, the partition firmware sends a request for data to the hypervisor. When the hypervisor receives the request for data, the hypervisor returns a taskID that identifies the task allocated to handle the request. Partition firmware records the taskID and a timestamp, which indicates the time in which the hypervisor received the request. A timer is set to measure the amount of time elapsed since the task ID was received by a requesting partition firmware. If the hypervisor has not provided the partition firmware with the requested data after a predetermined time period measured by the timer has elapsed, the partition firmware inquires about the status of the task associated with the taskID. If the task is still running, the partition firmware returns control of the partition to the operating system.

Abstract: Hypervisor page fault processing logic is provided for a shared memory partition data processing system. The logic, responsive to an executing virtual processor of the shared memory partition data processing system encountering a hypervisor page fault, allocates an input/output (I/O) paging request to the virtual processor from an I/O paging request pool and increments an outstanding I/O paging request count for the virtual processor. A determination is then made whether the outstanding I/O paging request count for the virtual processor is at a predefined threshold, and if not, the logic places the virtual processor in a wait state with interrupt wake-up reasons enabled based on the virtual processor's state, otherwise, it places the virtual processor in a wait state with interrupt wake-up reasons disabled.

Abstract: Migration management is provided for a shared memory logical partition migrating from a source system to a target system. The management approach includes managing migration of the logical partition from the source system to the target system by: transferring a portion of logical partition state information for the migrating logical partition from the source system to the target system by copying at the source system contents of a logical page of the migrating logical partition into a state record buffer for forwarding to the target system; forwarding the state record buffer to the target system; and determining whether the migrating logical partition is suspended at the source system, and if not, copying at the target system contents of the state record buffer to paging storage of the target system, the paging storage being external to physical memory managed by a hypervisor of the target system.

Abstract: Transparent hypervisor pinning of critical memory areas is provided for a shared memory partition data processing system. The transparent hypervisor pinning includes receiving at a hypervisor a hypervisor call initiated by a logical partition to register a logical memory area of the logical partition with the hypervisor. Responsive to this hypervisor call, the hypervisor transparently determines whether the logical memory is a critical memory area for access by the hypervisor. If the logical memory area is a critical memory area, then the hypervisor automatically pins the logical memory area to physical memory of the shared memory partition data processing system, thereby ensuring that the memory area will not be paged-out from physical memory to external storage, and thus ensuring availability of the logic memory area to the hypervisor.

Abstract: Migration management is provided for a shared memory logical partition migrating from a source system to a target system. The management approach includes managing migration of the logical partition from the source system to the target system by: transferring a portion of logical partition state information for the migrating logical partition from the source system to the target system by copying at the source system contents of a logical page of the migrating logical partition into a state record buffer for forwarding to the target system; forwarding the state record buffer to the target system; and determining whether the migrating logical partition is suspended at the source system, and if not, copying at the target system contents of the state record buffer to paging storage of the target system, the paging storage being external to physical memory managed by a hypervisor of the target system.

Abstract: Hypervisor page fault processing logic is provided for a shared memory partition data processing system. The logic, responsive to an executing virtual processor of the shared memory partition data processing system encountering a hypervisor page fault, allocates an input/output (I/O) paging request to the virtual processor from an I/O paging request pool and increments an outstanding I/O paging request count for the virtual processor. A determination is then made whether the outstanding I/O paging request count for the virtual processor is at a predefined threshold, and if not, the logic places the virtual processor in a wait state with interrupt wake-up reasons enabled based on the virtual processor's state, otherwise, it places the virtual processor in a wait state with interrupt wake-up reasons disabled.

Abstract: Transparent hypervisor pinning of critical memory areas is provided for a shared memory partition data processing system. The transparent hypervisor pinning includes receiving at a hypervisor a hypervisor call initiated by a logical partition to register a logical memory area of the logical partition with the hypervisor. Responsive to this hypervisor call, the hypervisor transparently determines whether the logical memory is a critical memory area for access by the hypervisor. If the logical memory area is a critical memory area, then the hypervisor automatically pins the logical memory area to physical memory of the shared memory partition data processing system, thereby ensuring that the memory area will not be paged-out from physical memory to external storage, and thus ensuring availability of the logic memory area to the hypervisor.

Abstract: A system for comparing a first taxonomy and a second taxonomy. The system may comprise at least one processor having associated cache memory, a cache module and a comparison module. The cache module may be configured to load a portion of a comparison sample to the cache memory. The comparison sample may comprise a part of the first taxonomy and a part of the second taxonomy. The comparison module may be configured to cause the processor to retrieve the portion of the first comparison sample from the cache memory and compare the portion of the first comparison sample.

Abstract: An apparatus comprising: a display for presenting information to a user; a housing connected to the display for supporting the display; and a keyboard assembly deployable through a sliding connection to the housing, the keyboard assembly deployable in multiple directions, the information presented to the user through the display is oriented based on deployment of the keyboard assembly, direction of deployment of the keyboard assembly, and input from an application resident on the device. The application prescribes the orientation of the information presented on the display to the user in relation to the direction of keyboard assembly deployment.

Abstract: In response to a hypervisor page fault for memory that is not resident in a shared memory pool, an I/O paging request is sent to an external storage paging space. In response to a paging service partition encountering an I/O paging error, a paging failure indication is sent to the hypervisor. A simulated machine check interrupt instruction is sent from the hypervisor to the shared memory partition and a machine check handler obtains control. The machine check handler performs data analysis utilizing an error log in an attempt to isolate the I/O paging error to a process or a set of processes in the shared memory partition. The process or set of processes associated with the I/O paging error, or the shared memory partition itself, may be terminated. Finally, the shared memory partition may clear or initialize the page associated with the I/O paging error.

Abstract: Relocating data in a virtualized environment maintained by a hypervisor administering access to memory with a Cache Page Table (‘CPT’) and a Physical Page Table (‘PPT’), the CPT and PPT including virtual to physical mappings. Relocating data includes converting the virtual to physical mappings of the CPT to virtual to logical mappings; establishing a Logical Memory Block (‘LMB’) relocation tracker that includes logical addresses of an LMB, source physical addresses of the LMB, target physical addresses of the LMB, a translation block indicator for each relocation granule, and a pin count associated with each relocation granule; establishing a PPT entry tracker including PPT entries corresponding to the LMB to be relocated; relocating the LMB in a number of relocation granules including blocking translations to the relocation granules during relocation; and removing the logical addresses from the LMB relocation tracker.

Abstract: Methods, apparatus, and products are disclosed for controlling an operational mode for a logical partition on a computing system that include: receiving, in a hypervisor installed on the computing system, a processor compatibility mode for the logical partition and a firmware compatibility mode for the logical partition, the processor compatibility mode specifying a processor architecture version configured for the logical partition, and the firmware compatibility mode specifying a firmware architecture version configured for the logical partition; providing, by the hypervisor for the logical partition, a firmware interface in dependence upon the firmware compatibility mode; and providing, by the hypervisor for the logical partition, a processor interface in dependence upon the processor compatibility mode.

Abstract: An apparatus comprising: a display for presenting information to a user; a housing connected to the display for supporting the display; and a keyboard deployable through a sliding connection to the housing, the keyboard deployable in multiple directions, the information presented to the user through the display is oriented based on deployment of the keyboard, direction of deployment of the keyboard, and input from an application resident on the device. The application prescribes the orientation of the information presented on the display to the user in relation to the direction of keyboard deployment.

Abstract: An apparatus comprising: a display for presenting information to a user; a housing connected to the display for supporting the display; and a keyboard assembly deployable through a sliding connection to the housing, the keyboard assembly deployable in multiple directions, the information presented to the user through the display is oriented based on deployment of the keyboard assembly, direction of deployment of the keyboard assembly, and input from an application resident on the device. The application prescribes the orientation of the information presented on the display to the user in relation to the direction of keyboard assembly deployment.

Abstract: Migration management is provided for a shared memory logical partition migrating from a source system to a target system. The management approach includes managing migration of the logical partition from the source system to the target system by: transferring a portion of logical partition state information for the migrating logical partition from the source system to the target system by copying at the source system contents of a logical page of the migrating logical partition into a state record buffer for forwarding to the target system; forwarding the state record buffer to the target system; and determining whether the migrating logical partition is suspended at the source system, and if not, copying at the target system contents of the state record buffer to paging storage of the target system, the paging storage being external to physical memory managed by a hypervisor of the target system.

Abstract: Dynamic control of memory affinity is provided for a shared memory logical partition within a shared memory partition data processing system having a plurality of nodes. The memory affinity control approach includes: determining one or more home node assignments for the shared memory logical partition, with each assigned home node being one node of the plurality of nodes of the system; determining a desired physical page level per node for the shared memory logical partition; and allowing the shared memory partition to run and using the home node assignment(s) and its desired physical page level(s) in the dispatching of tasks to physical processors in the nodes and in hypervisor page memory management to dynamically control memory affinity of the shared memory logical partition in the data processing system.