Abstract: The present invention relates to a device for controlling a transistor, comprising: a separating assembly for generating a first voltage, a transformer for obtaining a first and second converted voltage from the first voltage, a rectifier circuit for generating a third voltage from parts of the same sign of the first converted voltage and of the opposite of the second converted voltage, a latch for generating a fourth voltage from the converted voltages, a switching assembly for multiplying the third voltage with a fourth voltage normalized in order to obtain a multiplied voltage, and a shifting circuit for shifting the multiplied amplitude in order to obtain a control voltage.

Abstract: The present invention relates to a device for controlling a transistor, comprising: a separating assembly for generating a first voltage, a transformer for obtaining a first and second converted voltage from the first voltage, a rectifier circuit for generating a third voltage from parts of the same sign of the first converted voltage and of the opposite of the second converted voltage, a latch for generating a fourth voltage from the converted voltages, a switching assembly for multiplying the third voltage with a fourth voltage normalized in order to obtain a multiplied voltage, and a shifting circuit for shifting the multiplied amplitude in order to obtain a control voltage.

Abstract: A power converter comprises a power structure receiving, as input, an AC voltage comprising at least one phase and delivering, as output, a DC voltage, the output power of the power structure being regulated by a multiplier receiving, as input, a current control signal and a signal proportional to the output voltage of the power structure, the current control signal being generated by a current correction module receiving, as input, a signal proportional to the difference between the output current of the power structure and a current setpoint signal. Electrical network comprising such a power conversion circuit is also provided.

Abstract: A circuit for generating at least two rectangular signals with adjustable phase shift, comprises a frequency divider circuit that receives a clock signal as input and provides a signal as output, at least two comparators that receive, respectively, a first threshold voltage and at least a second threshold voltage at one input, and a ramp signal, synchronized with the clock signal, at a second input, the at least two threshold voltages allowing the value of the phase shift between the at least two rectangular signals to be adjusted, and at least two D-type flip-flops that receive, respectively, the output signal from the first comparator and the output signal from the second comparator at their clock inputs, and the output signal from the frequency divider circuit at their D-input.

Abstract: A power converter comprises a power structure receiving, as input, an AC voltage comprising at least one phase and delivering, as output, a DC voltage, the output power of the power structure being regulated by a multiplier receiving, as input, a current control signal and a signal proportional to the output voltage of the power structure, the current control signal being generated by a current correction module receiving, as input, a signal proportional to the difference between the output current of the power structure and a current setpoint signal. Electrical network comprising such a power conversion circuit is also provided.

Abstract: A circuit for generating at least two rectangular signals with adjustable phase shift, comprises a frequency divider circuit that receives a clock signal as input and provides a signal as output, at least two comparators that receive, respectively, a first threshold voltage and at least a second threshold voltage at one input, and a ramp signal, synchronized with the clock signal, at a second input, the at least two threshold voltages allowing the value of the phase shift between the at least two rectangular signals to be adjusted, and at least two D-type flip-flops that receive, respectively, the output signal from the first comparator and the output signal from the second comparator at their clock inputs, and the output signal from the frequency divider circuit at their D-input.