Patents by Inventor David Lee Randall

David Lee Randall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7650530
    Abstract: EEH methods are used during the boot process to actively disable a defective PCI adapter, thereby allowing the system boot to continue without disruption. This allows faulty adapters to be present in the machine without interrupting the boot process. The slots appear to be empty and the devices/adapters residing therein can be actively “hot swapped” out without altering the rest of the machine state.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: January 19, 2010
    Assignee: International Business Machines Corporation
    Inventors: Bradley Ryan Harrington, David Lee Randall, Scott Douglas Walton, David Ross Willoughby
  • Publication number: 20080189525
    Abstract: A computer implemented method, data processing system, and computer usable program code are provided for implementing a two phase open firmware driver. A computer system probes a device for a dummy image that uses open firmware code in a compiled format. The computer system executes the dummy image. The dummy image has a dummy OPEN method and minimal properties for the device. The dummy OPEN method byte-loads a full image that uses open firmware code in a compiled format and transfers control to an OPEN method contained in the full image. The computer system loads the dummy OPEN method and minimal properties into a memory in the computer system.
    Type: Application
    Filed: October 17, 2006
    Publication date: August 7, 2008
    Inventors: David Lee Randall, Muhamed Sadic, Colleen Renee Stouffer, Mark Walz Wenning
  • Patent number: 7146515
    Abstract: A system, method, and computer program product are disclosed for executing a reliable warm reboot of one of multiple partitions included in a logically partitioned data processing system. The data processing system includes partition hardware. A request to reboot a particular partition is received within the partition where the particular partition includes multiple processors. Prior to executing the reboot request, the partition hardware is set to a predetermined state. The reboot request is then executed within the particular partition. The predetermined state is preferably achieved by resetting the partition hardware to a predetermined state.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: December 5, 2006
    Assignee: International Business Machines Corporation
    Inventors: Bradley Ryan Harrington, Chetan Mehta, Milton Devon Miller, II, Michael Anthony Perez, David Lee Randall, David R. Willoughby
  • Patent number: 7117385
    Abstract: A method, apparatus, and computer instructions for recovering terminated partitions in a logical partitioned data processing system. A termination of a partition in a set of partitions associated with a host bridge in the logical partitioned data processing system is detected. The state of other partitions within the set of partitions is checked in response to detecting the termination. A recovery process is initiated if all partitions in the set of partitions have terminated. Input/output slots associated with the host bridge are reset to a normal state if the recovery process is successful. The set of partitions is rebooted after resetting the input/output slots associated with the host bridge without rebooting the logical partitioned data processing system.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: October 3, 2006
    Assignee: International Business Machines Corporation
    Inventors: Shaival J. Chokshi, Ashwini Kulkarni, Van Hoa Lee, David Lee Randall, Thi Ngoc Tran, David R. Willoughby
  • Patent number: 6968477
    Abstract: A system and method for monitoring a host computer using a service processor is provided. A shared nonvolatile random access memory (NVRAM) area is used to store progress information from the host computer system. The host computer system writes progress information corresponding to the initialization step being performed to the shared NVRAM and also updates a host pointer in the NVRAM. The service processor reads the shared NVRAM and compares its pointer with the host pointer to determine whether new host initialization activity has been reported. The service processor sets a timer so that if host activity is not reported during a set amount of time an error condition occurs causing the service processor to handle the host computer error. An optional service processor routine determines whether the host computer is stuck in an initialization loop whereupon the service processor once again handles the host computer error.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: November 22, 2005
    Assignee: International Business Machines Corporation
    Inventors: Chetan Mehta, Jayeshkumar M. Patel, Manesh Patel, David Lee Randall
  • Patent number: 6961785
    Abstract: A system for managing input/output drawers within a data processing system. A unique identifier is assigned to each of a plurality of drawers, and is used by the operating system to identify the drawers in the system regardless of how these drawers are interconnected. Another unique PCI-bridge identifier is assigned to each of a plurality of PCI Host bridges (PHBs) from all drawers, and is used by the operating system to perform input/output processes to devices associated with the plurality of PHBs such that the ODM object for each of the PHBs remains the same regardless of how the drawer is interconnected in the system. When a new drawer is added to the system, a new unique identifier is assigned to the new drawer ensuring that the unique identifiers previously assigned to the other drawers are not used to identify the new drawer.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: November 1, 2005
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Tam D. Bui, Van Hoa Lee, David Lee Randall, Kiet Anh Tran, David R. Willoughby
  • Patent number: 6901537
    Abstract: A method, apparatus, and computer instructions for halting input/output error propagation in the logically partitioned data processing system. All components associated with the bridge are identified to form a set of failed components in response to detecting an error state in a bridge within a set of bridges in the logical partitioned data processing system. An identification of the failed components is stored in which the identification is used by each partition during a boot process.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: May 31, 2005
    Assignee: International Business Machines Corporation
    Inventors: George John Dawkins, Mark Elliott Hack, Ashwini Kulkarni, Gordon D. McIntosh, Kanisha Patel, David Lee Randall, David R. Willoughby
  • Patent number: 6898731
    Abstract: A system, method, and computer program product are disclosed for preventing machine crashes due to hard errors in one of multiple, different processors that are included in a logically partitioned data processing system. An error occurring in one of the processors is detected. A determination is then made regarding whether the processor has been deconfigured. The partition is then rebooted only in response to a determination that the processor has been deconfigured and will not be included in the partition processor resources. Thus, only the configured processors are rebooted. The deconfigured processor is not rebooted.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: May 24, 2005
    Assignee: International Business Machines Corporation
    Inventors: Mark Elliott Hack, Alongkorn Kitamorn, Gordon D. McIntosh, Milton Devon Miller, II, Kanisha Patel, David Lee Randall
  • Publication number: 20040210793
    Abstract: A method, apparatus, and computer instructions for recovering terminated partitions in a logical partitioned data processing system. A termination of a partition in a set of partitions associated with a host bridge in the logical partitioned data processing system is detected. The state of other partitions within the set of partitions is checked in response to detecting the termination. A recovery process is initiated if all partitions in the set of partitions have terminated. Input/output slots associated with the host bridge are reset to a normal state if the recovery process is successful. The set of partitions is rebooted after resetting the input/output slots associated with the host bridge without rebooting the logical partitioned data processing system.
    Type: Application
    Filed: April 21, 2003
    Publication date: October 21, 2004
    Applicant: International Business Machines Corporation
    Inventors: Shaival J. Chokshi, Ashwini Kulkarni, Van Hoa Lee, David Lee Randall, Thi Ngoc Tran, David R. Willoughby
  • Publication number: 20040064761
    Abstract: EEH methods are used during the boot process to actively disable a defective PCI adapter, thereby allowing the system boot to continue without disruption. This allows faulty adapters to be present in the machine without interrupting the boot process. The slots appear to be empty and the devices/adapters residing therein can be actively “hot swapped” out without altering the rest of the machine state.
    Type: Application
    Filed: September 30, 2002
    Publication date: April 1, 2004
    Applicant: International Business Machines Corporation
    Inventors: Bradley Ryan Harrington, David Lee Randall, Scott Douglas Walton, David Ross Willoughby
  • Publication number: 20030236972
    Abstract: A system, method, and computer program product are disclosed for executing a reliable warm reboot of one of multiple partitions included in a logically partitioned data processing system. The data processing system includes partition hardware. A request to reboot a particular partition is received within the partition where the particular partition includes multiple processors. Prior to executing the reboot request, the partition hardware is set to a predetermined state. The reboot request is then executed within the particular partition. The predetermined state is preferably achieved by resetting the partition hardware to a predetermined state.
    Type: Application
    Filed: June 20, 2002
    Publication date: December 25, 2003
    Applicant: International Business Machines Corporation
    Inventors: Bradley Ryan Harrington, Chetan Mehta, Milton Devon Miller, Michael Anthony Perez, David Lee Randall, David R. Willoughby
  • Patent number: 6665759
    Abstract: A method, system, and computer program product for enforcing logical partitioning of input/output slots within a data processing system is provided. In one embodiment, the system includes a hypervisor and at least one DMA address checking component. The hypervisor receives non-direct-memory-access requests for access to input/output slots and prohibits devices within one logical partition from accessing the input/output slots assigned to a different logical partition. The DMA address checking component receives direct-memory-access requests and prohibits requests for addresses not within the same logical partition as the requesting device from being completed. Requests with addresses corresponding to the same logical partition as the requesting device are placed on the primary PCI bus by the DMA address checking component for delivery to the system memory.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: December 16, 2003
    Assignee: International Business Machines Corporation
    Inventors: George John Dawkins, Van Hoa Lee, David Lee Randall, Kiet Anh Tran
  • Patent number: 6625728
    Abstract: A method for locating a defective component in a data processing system during system startup is disclosed. Each component within the data processing system is assigned a location code. Then, a progress code is associated with a location code and a function being loaded to, tested, or executed in a component. After supplying power to the data processing system, the components of the data processing system are initialized and tested to establish a configuration. During the initialization and testing, a location code of a component and a corresponding progress code are displayed on a display panel. In response to a system hang, a defective component can be identified utilizing the location code and the progress code displayed on the display panel.
    Type: Grant
    Filed: November 2, 1999
    Date of Patent: September 23, 2003
    Assignee: International Business Machines Corporation
    Inventors: George Henry Ahrens, George John Dawkins, Michael Youhour Lim, Thomas Francis Ploski, David Lee Randall, Daniel John Ribbentrop, Sr.
  • Publication number: 20030172320
    Abstract: A system and method for monitoring a host computer using a service processor is provided. A shared nonvolatile random access memory (NVRAM) area is used to store progress information from the host computer system. The host computer system writes progress information corresponding to the initialization step being performed to the shared NVRAM and also updates a host pointer in the NVRAM. The service processor reads the shared NVRAM and compares its pointer with the host pointer to determine whether new host initialization activity has been reported. The service processor sets a timer so that if host activity is not reported during a set amount of time an error condition occurs causing the service processor to handle the host computer error. An optional service processor routine determines whether the host computer is stuck in an initialization loop whereupon the service processor once again handles the host computer error.
    Type: Application
    Filed: March 7, 2002
    Publication date: September 11, 2003
    Applicant: International Business Machines Corporation
    Inventors: Chetan Mehta, Jayeshkumar M. Patel, Manesh Patel, David Lee Randall
  • Publication number: 20030163768
    Abstract: A method, apparatus, and computer instructions for halting input/output error propagation in the logically partitioned data processing system. All components associated with the bridge are identified to form a set of failed components in response to detecting an error state in a bridge within a set of bridges in the logical partitioned data processing system. An identification of the failed components is stored in which the identification is used by each partition during a boot process.
    Type: Application
    Filed: February 27, 2002
    Publication date: August 28, 2003
    Applicant: International Business Machines Corporation
    Inventors: George John Dawkins, Mark Elliott Hack, Ashwini Kulkarni, Gordon D. McIntosh, Kanisha Patel, David Lee Randall, David R. Willoughby
  • Publication number: 20030131279
    Abstract: A system, method, and computer program product are disclosed for preventing machine crashes due to hard errors in one of multiple, different processors that are included in a logically partitioned data processing system. An error occurring in one of the processors is detected. A determination is then made regarding whether the processor has been deconfigured. The partition is then rebooted only in response to a determination that the processor has been deconfigured and will not be included in the partition processor resources. Thus, only the configured processors are rebooted. The deconfigured processor is not rebooted.
    Type: Application
    Filed: January 10, 2002
    Publication date: July 10, 2003
    Applicant: International Business Machines Corporation
    Inventors: Mark Elliott Hack, Alongkorn Kitamorn, Gordon D. McIntosh, Milton Devon Miller, Kanisha Patel, David Lee Randall
  • Patent number: 6574752
    Abstract: A method, system and computer program are described for isolating bus errors detected during system start-up by utilizing a technique in which a shared mailbox associated with a service processor is provided for holding the address of an adapter in an I/O drawer. If an error is detected the server processor is notified. The server processor then retrieves the address from the mailbox, uses it to derive a location code which is then passed along with the error code to an appropriate error analysis routine. The start-up procedure is then shut down.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: June 3, 2003
    Assignee: International Business Machines Corporation
    Inventors: George Henry Ahrens, John C. Kennel, Jeffrey Scott Mayes, Maulin Ishwarbhai Patel, David Lee Randall
  • Patent number: 6530031
    Abstract: A method and apparatus to provide accurate and automated timing of firmware routines, such as initialization tasks at boot time, is provided. Since each task sends a progress indicator code to a display buffer when it starts to run, by saving processor time stamps at the time these codes change, it is possible to calculate and store the time duration for each routine. In the case of system initialization, these time durations can be an indication of problems if they are much longer than normal or an indication of excessive, inefficient, or ineffective processing that might be speed up in order to reduce the total boot time.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: March 4, 2003
    Assignee: International Business Machines Corporation
    Inventors: David Lee Randall, David Ross Willoughby
  • Publication number: 20020124127
    Abstract: A method, system, and computer program product for enforcing logical partitioning of input/output slots within a data processing system is provided. In one embodiment, the system includes a hypervisor and at least one DMA address checking component. The hypervisor receives non-direct-memory-access requests for access to input/output slots and prohibits devices within one logical partition from accessing the input/output slots assigned to a different logical partition. The DMA address checking component receives direct-memory-access requests and prohibits requests for addresses not within the same logical partition as the requesting device from being completed. Requests with addresses corresponding to the same logical partition as the requesting device are placed on the primary PCI bus by the DMA address checking component for delivery to the system memory.
    Type: Application
    Filed: March 1, 2001
    Publication date: September 5, 2002
    Applicant: International Business Machines Corporation
    Inventors: George John Dawkins, Van Hoa Lee, David Lee Randall, Kiet Anh Tran
  • Patent number: 6304983
    Abstract: A processor register is reserved by early firmware code to be employed for checkpoint logging or for storing diagnostic information at the time of failure before a checkpoint display device, usually contained within an I/O subsystem, is initialized. Early firmware codes are usually written in assembly language and the firmware of the present invention dedicates a processor register for logging checkpoint information. If a machine fails before any checkpoint, or point of failure, is displayed by a checkpoint display device, a dedicated processor register has logged any checkpoint or diagnostic information. The error information relating to the failure is obtained from the dedicated register through JTAG (Joint Task Action Group) scanning utilizing a processor debugging tool.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: October 16, 2001
    Assignee: International Business Machines Corporation
    Inventors: Van Hoa Lee, David Lee Randall