Patents by Inventor David Lehninger

David Lehninger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145572
    Abstract: A structural element may have a ferroelectric or antiferroelectric layer formed on a substrate. The ferroelectric or antiferroelectric layer is doped with a first dopant and at least one second dopant. The ferroelectric or antiferroelectric layer can be formed of HfO2 or ZrO2 and doped with the first dopant Hf or Zr and with the second dopant Al, Si, La, Y, Gd or Sr.
    Type: Application
    Filed: October 24, 2023
    Publication date: May 2, 2024
    Inventors: David LEHNINGER, Ayse SÜNBÜL, Maximilan LEDERER, Konrad SEIDEL
  • Publication number: 20230326747
    Abstract: A method for producing a ferroelectric layer or antiferroelectric layer in which a layer of a paraelectric material already deposited on a surface of a substrate with a layer thickness of at least two crystallographic unit cells is introduced into an alternating electric field. The alternating electric field is repeatedly cycled between a positive electric field strength and a negative electric field strength of amplitude greater than the coercivity field strength of the material such that the layer of paraelectric material forms a polarization.
    Type: Application
    Filed: August 10, 2021
    Publication date: October 12, 2023
    Inventors: Konrad SEIDEL, Maximilian LEDERER, Ricardo REVELLO, David LEHNINGER
  • Publication number: 20220344359
    Abstract: Memory cells include various versions of a capacitor structure including a polarization retention member. Each polarization retention member includes an antiferroelectric layer over a ferroelectric layer. The antiferroelectric layer, among other layers, can be tailored to customize the hysteresis loop shape, and the coercive electric field required to change polarization of the memory cell. Metal electrodes, and/or dielectric or metallic interlayers may also be employed to tailor the hysteresis. The memory cells can include FeRAMs or FeFETs. The memory cells provide a lower coercive electric field requirement compared to conventional ferroelectric memory cells, enhanced reliability, and require minimum changes to integrate into current integrated circuit fabrication processes.
    Type: Application
    Filed: April 22, 2021
    Publication date: October 27, 2022
    Inventors: Tarek Ali, Konstantin Mertens, Maximilian Lederer, David Lehninger, Konrad Seidel