Patents by Inventor David Leonard Larkin

David Leonard Larkin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10679935
    Abstract: A method and structure suitable for, e.g., improving high voltage breakdown reliability of a microelectronic device such as a capacitor usable for galvanic isolation of two circuits. A first dielectric layer has a first dielectric constant located over a semiconductor substrate. A metal structure located over the first dielectric layer has a side surface. A second dielectric layer having a second different dielectric constant is located adjacent the metal structure. A dielectric structure located between the side surface of the metal structure and the second dielectric layer has the first dielectric constant.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: June 9, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jeffrey A. West, Byron Lovell Williams, David Leonard Larkin, Weidong Tian
  • Publication number: 20200013713
    Abstract: A method and structure suitable for, e.g., improving high voltage breakdown reliability of a microelectronic device such as a capacitor usable for galvanic isolation of two circuits. A first dielectric layer has a first dielectric constant located over a semiconductor substrate. A metal structure located over the first dielectric layer has a side surface. A second dielectric layer having a second different dielectric constant is located adjacent the metal structure. A dielectric structure located between the side surface of the metal structure and the second dielectric layer has the first dielectric constant.
    Type: Application
    Filed: September 16, 2019
    Publication date: January 9, 2020
    Inventors: Jeffrey A. West, Byron Lovell Williams, David Leonard Larkin, Weidong Tian
  • Patent number: 10418320
    Abstract: A method and structure suitable for, e.g., improving high voltage breakdown reliability of a microelectronic device such as a capacitor usable for galvanic isolation of two circuits. A metal plate having a top surface and a side surface is located over a first dielectric layer. A second dielectric layer of a second different material is located over the first metal plate. A dielectric structure of the first material is located over the side surface of the metal plate and over the surface of the first dielectric layer.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: September 17, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jeffrey A. West, Byron Lovell Williams, David Leonard Larkin, Weidong Tian
  • Publication number: 20190006276
    Abstract: A method and structure suitable for, e.g., improving high voltage breakdown reliability of a microelectronic device such as a capacitor usable for galvanic isolation of two circuits. A metal plate having a top surface and a side surface is located over a first dielectric layer. A second dielectric layer of a second different material is located over the first metal plate. A dielectric structure of the first material is located over the side surface of the metal plate and over the surface of the first dielectric layer.
    Type: Application
    Filed: September 11, 2018
    Publication date: January 3, 2019
    Inventors: Jeffrey A. West, Byron Lovell Williams, David Leonard Larkin, Weidong Tian
  • Patent number: 10109574
    Abstract: A method and structure for improving high voltage breakdown reliability of a microelectronic device, e.g., a galvanic digital isolator, involves providing an abatement structure around metal plate corners of a high voltage isolation capacitor to ameliorate the effects of an electric field formed thereat during operation of the device due to dielectric discontinuity.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: October 23, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Jeffrey A. West, Byron Lovell Williams, David Leonard Larkin, Weidong Tian
  • Publication number: 20180286802
    Abstract: A method and structure for improving high voltage breakdown reliability of a microelectronic device, e.g., a galvanic digital isolator, involves providing an abatement structure around metal plate corners of a high voltage isolation capacitor to ameliorate the effects of an electric field formed thereat during operation of the device due to dielectric discontinuity.
    Type: Application
    Filed: April 4, 2017
    Publication date: October 4, 2018
    Inventors: Jeffrey A. West, Byron Lovell Williams, David Leonard Larkin, Weidong Tian
  • Patent number: 7755400
    Abstract: Systems and methods for digital isolation in circuits are provided. On power-up in an isolation application, there may be multiple power supplies. For example, one for an input side and one for an output side, both in relation to an isolation barrier. Upon power up, the input and output may not be at the same state. The bias of the output may be the opposite of what is on the input. An isolator solution is provided which integrates the digital isolation into the analog solution. A DC signal corresponds to the static state of the data at start-up and an AC signal is generated when switching begins. In one example, the output level corresponds to the input level when the steady state information is encoded and sent across as an AC signal.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: July 13, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Ricky Dale Jordanger, David Leonard Larkin, David Wayne Stout
  • Publication number: 20090295451
    Abstract: Systems and methods for digital isolation in circuits are provided. On power-up in an isolation application, there may be multiple power supplies. For example, one for an input side and one for an output side, both in relation to an isolation barrier. Upon power up, the input and output may not be at the same state. The bias of the output may be the opposite of what is on the input. An isolator solution is provided which integrates the digital isolation into the analog solution. A DC signal corresponds to the static state of the data at start-up and an AC signal is generated when switching begins. In one example, the output level corresponds to the input level when the steady state information is encoded and sent across as an AC signal.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 3, 2009
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ricky Dale Jordanger, David Leonard Larkin, David Wayne Stout