Abstract: A gain control for a phase locked loop circuit is provided. In the phase-locked loop circuit, a voltage controlled oscillator generates a reference signal responsive to the level of a tuning voltage. A phase detector generates the tuning voltage update, which is indicative of a phase relationship between the reference signal and an input signal. A feedback circuit detects the tuning voltage and generates an adjustment signal in response. The adjustment signal is then used to adjust the loop gain at any specific tuning voltage. In a specific example, the adjustment signal is used to adjust the current gain of the phase detector in a manner that is complementary to the non-linear voltage gain of the voltage-controlled oscillator.

Abstract: Oscillator control circuitry for a phase lock loop, including phase detection circuitry, control signal generator circuitry, bias control circuitry and charge pump circuitry. The control signal generator circuitry introduces specific and distinct time delays to the phase signals from the phase detection circuitry representing the phase difference between the reference and oscillator output signals. These time delays cause the bias control circuitry to enable and disable the output charge pump circuitry slightly before and after, respectively, those time intervals during which an output source (“pump up”) or sink (“pump down”) current is needed to drive the oscillator via the loop filter. This produces charge pump circuitry output signals with significantly faster rise and fall times and shorter pulse widths, thereby resulting in a charge pump output signal with higher SNR and reduced spurious signal energy.