Patents by Inventor David Litfin

David Litfin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9269705
    Abstract: A circuit for protecting a metal oxide semiconductor (MOS) device is configured to hold down or pull down a voltage at a gate of the protected MOS device during an electrostatic discharge (ESD) event. The circuit includes at least one active device or capacitance-providing element connected to the gate of the protected MOS device, configured to pull down or hold down the voltage at the gate of the protected MOS device when the ESD event occurs.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: February 23, 2016
    Assignee: Polar Semiconductor, LLC
    Inventors: Kurt Kimber, David Litfin
  • Publication number: 20130292770
    Abstract: A circuit for protecting a metal oxide semiconductor (MOS) device is configured to hold down or pull down a voltage at a gate of the protected MOS device during an electrostatic discharge (ESD) event. The circuit includes at least one active device or capacitance-providing element connected to the gate of the protected MOS device, configured to pull down or hold down the voltage at the gate of the protected MOS device when the ESD event occurs.
    Type: Application
    Filed: May 4, 2012
    Publication date: November 7, 2013
    Applicant: POLAR SEMICONDUCTOR, INC.
    Inventors: Kurt Kimber, David Litfin
  • Publication number: 20070120191
    Abstract: An electrostatic discharge protection device with a high trigger current includes a semiconductor layer, a well region formed in the semiconductor layer, an anode region formed in the well region, a cathode region formed in the semiconductor layer, a bridging region bridging a junction between the semiconductor layer and the well region, and a heavily doped P-region encircling the cathode region.
    Type: Application
    Filed: November 28, 2005
    Publication date: May 31, 2007
    Applicant: Polar Semiconductor, Inc.
    Inventor: David Litfin
  • Publication number: 20070080403
    Abstract: An ESD protection device with a low trigger voltage includes a semiconductor layer, a lightly doped well region formed in the semiconductor layer, a highly doped anode region formed in the well region, a highly doped cathode region formed in the semiconductor layer, a highly doped bridging region bridging a junction between the semiconductor layer and the well region, and a highly doped channel stop region of formed in semiconductor layer between the cathode region and the bridging region. The trigger voltage may be adjusted over a range of voltages, and the ESD protection devices may be connected in parallel in order to be effective in very high current situations.
    Type: Application
    Filed: October 6, 2005
    Publication date: April 12, 2007
    Inventors: David Litfin, Steven Kosier
  • Patent number: 6898061
    Abstract: A system and method for dynamically protecting a vulnerable device from an ESD event includes an ESD event sensor and a breakdown voltage adjustment circuit. The ESD event sensor detects an ESD event and provides a signal to the breakdown voltage adjustment circuit indicating that an ESD event has occurred. The breakdown voltage adjustment circuit receives the signal from the ESD event sensor and adjusts the breakdown voltage of the vulnerable device during the ESD event.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: May 24, 2005
    Assignee: PolarFab, LLC
    Inventors: Kurt Kimber, David Litfin