Abstract: A voltage variable capacitor (VVC) having two terminals in a variable frequency crystal oscillator integrated into a common substrate with the oscillator circuitry and isolated therefrom. The VVC is constructed using the same processing steps as the oscillator circuitry and achieves low series resistance and wide capacitance variation by utilizing a substrate or epitaxial layer (body) having a well with a diffused region therein. The region, of the same conductivity type as the well and a first one of the two terminals, forms a rectangular ring in the well. Over the region and insulated therefrom, a conductive layer is deposited to provide a second one of the two terminals. Both terminals are electrically isolated from the body.

Abstract: Maximum frequency range in a VLSI voltage controllable crystal oscillator is obtained with a two-stage amplifier with feedback across both stages. The first stage is implemented by an MOS transistor connected in source-follower configuration to minimize input capacitance, and the second stage is implemented by a bipolar transistor to provide the needed gain. A bidirectional voltage limiter connected to a crystal node limits the oscillations to a symmetrical waveform. The bias of an output buffer amplifier may be selectively shifted to maintain optimum duty cycle with the different triggering levels of diverse logic driven by the oscillator, and the bias may be dynamically driven by an analog signal to provide a duty cycle-modulated output.

Abstract: Maximum frequency range in a CMOS voltage-controllable crystal oscillator is obtained with a two-stage amplifier with feedback across both stages. The first stage is connected in source-follower configuration to minimize input capacitance, and the second stage provides the needed gain. To eliminate body effect, the source electrode and body of the second stage CMOS device are connected together. A bidirectional voltage limiter connected to a crystal node limits the oscillations to a symmetrical waveform. Changes in effective duty cycle caused by the different triggering levels of diverse logic connected to the oscillator output are compensated for by selectively shifting dc bias to a buffer amplifier.

Abstract: An electronic tone ringer provides a distinctive ringing capability through the use of two oscillators which allow selection of four tones and four modulation rates. In determining the type of tone generated, formattable inputs select between frequency shift or amplitude modulation modes or disabling the modulation altogether to generate a single tone. In the frequency shift mode, two fundamental frequencies are generated which are related by a predetermined ratio, the output tone alternating between these two frequencies at one of four selectable modulation rates. In the amplitude modulation mode, a single frequency is switched on and off at the selected modulation rate. All of the tones are produced with a duty cycle appropriate for driving an electromagnetic acoustic transducer.

Abstract: In the disclosed coded telephone ringing signal method and circuitry, audibly distinguishable ringing codes are generated by alternately shifting between at least a pair of single frequency tones at different modulation rates. Other distinguishable ringing codes are generated by changing both the modulation rates and tone frequencies utilized.

Abstract: An electronic tone ringer responds to ringing signals on a telephone line while being unresponsive to dialing pulses or other signals on the line. Powered directly from the telephone line or alternatively from an external DC supply, the ringer uses a digital integration and detection arrangement for distinguishing between valid and invalid ringing signals. A distinctive ringing capability for the tone ringer is also available through the use of two oscillators which allow selection of four frequencies and four modulation rates.