Patents by Inventor David M. Heminger
David M. Heminger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9520388Abstract: In one embodiment, a semiconductor device may include a first transistor having a first current carrying electrode, a second current carrying electrode, and a control electrode; a first bipolar transistor having a collector coupled to the first current carrying electrode of the first transistor, a base coupled to the second current carrying electrode of the first transistor, and an emitter of the first bipolar transistor coupled to a first node of the semiconductor device. In an embodiment, the first node is connected to a terminal of a semiconductor package. An embodiment may include a semiconductor component coupled between the base of the first bipolar transistor and the emitter of the second bipolar transistor.Type: GrantFiled: November 3, 2014Date of Patent: December 13, 2016Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: David M. Heminger, Thomas Keena
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Publication number: 20160126236Abstract: In one embodiment, a semiconductor device may include a first transistor having a first current carrying electrode, a second current carrying electrode, and a control electrode; a first bipolar transistor having a collector coupled to the first current carrying electrode of the first transistor, a base coupled to the second current carrying electrode of the first transistor, and an emitter of the first bipolar transistor coupled to a first node of the semiconductor device. In an embodiment, the first node is connected to a terminal of a semiconductor package. An embodiment may include a semiconductor component coupled between the base of the first bipolar transistor and the emitter of the second bipolar transistor.Type: ApplicationFiled: November 3, 2014Publication date: May 5, 2016Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: David M. HEMINGER, Thomas KEENA
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Patent number: 8681458Abstract: In one embodiment, and electro-static discharge detector is formed with a plurality of channels and is configured to detect a positive electro-static discharge and a negative electro-static discharge.Type: GrantFiled: August 23, 2007Date of Patent: March 25, 2014Assignee: Semiconductor Components Industries, LLCInventors: Stephen Paul Robb, David M. Heminger, Alejandro Lara-Ascorra
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Patent number: 7579818Abstract: In one embodiment, a current regulator is configured to form a first signal representative of a current flow through a power switch and to use the first signal to determine an off-time of the power switch.Type: GrantFiled: July 28, 2005Date of Patent: August 25, 2009Assignee: Semiconductor Components Industries, L.L.C.Inventors: Alan R. Ball, David M. Heminger
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Publication number: 20090052100Abstract: In one embodiment, and electro-static discharge detector is formed with a plurality of channels and is configured to detect a positive electro-static discharge and a negative electro-static discharge.Type: ApplicationFiled: August 23, 2007Publication date: February 26, 2009Inventors: Stephen Paul Robb, David M. Heminger, Alejandro Lara-Ascorra
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Patent number: 7102199Abstract: A method of providing a Transient Voltage Suppression (TVS) device is described utilizing a Metal Oxide Semiconductor (MOS) structure and an Insulated Gate Bipolar Transistor (IGBT) structure. The MOS based TVS devices offer reduced leakage current with reduced clamp voltages between 0.5 and 5 volts. Trench MOS based TVS device (72) provides an enhanced gain operation, while device (88) provides a top side drain contact. The high gain MOS based TVS devices provide increased control over clamp voltage variation.Type: GrantFiled: April 4, 2003Date of Patent: September 5, 2006Assignee: Semiconductor Components Industries L.L.C.Inventors: Francine Y. Robb, Jeffrey Pearse, David M. Heminger, Stephen P. Robb
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Patent number: 7030447Abstract: A method of providing a Transient Voltage Suppression (TVS) device is described utilizing a Metal Oxide Semiconductor (MOS) structure and an Insulated Gate Bipolar Transistor (IGBT) structure. The MOS based TVS devices offer reduced leakage current with reduced clamp voltages between 0.5 and 5 volts. Trench MOS based TVS device (72) provides an enhanced gain operation, while device (88) provides a top side drain contact. The high gain MOS based TVS devices provide increased control over clamp voltage variation.Type: GrantFiled: July 15, 2003Date of Patent: April 18, 2006Assignee: Semiconductor Components Industries, L.L.C.Inventors: Francine Y. Robb, Jeffrey Pearse, David M. Heminger, Stephen P. Robb
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Publication number: 20040070029Abstract: A method of providing a Transient Voltage Suppression (TVS) device is described utilizing a Metal Oxide Semiconductor (MOS) structure and an Insulated Gate Bipolar Transistor (IGBT) structure. The MOS based TVS devices offer reduced leakage current with reduced clamp voltages between 0.5 and 5 volts. Trench MOS based TVS device (72) provides an enhanced gain operation, while device (88) provides a top side drain contact. The high gain MOS based TVS devices provide increased control over clamp voltage variation.Type: ApplicationFiled: July 15, 2003Publication date: April 15, 2004Inventors: Francine Y. Robb, Jeffrey Pearse, David M. Heminger, Stephen P. Robb
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Publication number: 20030205762Abstract: A method of providing a Transient Voltage Suppression (TVS) device is described utilizing a Metal Oxide Semiconductor (MOS) structure and an Insulated Gate Bipolar Transistor (IGBT) structure. The MOS based TVS devices offer reduced leakage current with reduced clamp voltages between 0.5 and 5 volts. Trench MOS based TVS device (72) provides an enhanced gain operation, while device (88) provides a top side drain contact. The high gain MOS based TVS devices provide increased control over clamp voltage variation.Type: ApplicationFiled: April 4, 2003Publication date: November 6, 2003Inventors: Francine Y. Robb, Jeffrey Pearse, David M. Heminger, Stephen P. Robb
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Patent number: 6633063Abstract: A method of providing a Transient Voltage Suppression (TVS) device is described utilizing a Metal Oxide Semiconductor (MOS) structure and an Insulated Gate Bipolar Transistor (IGBT) structure. The MOS based TVS devices offer reduced leakage current with reduced clamp voltages between 0.5 and 5 volts. Trench MOS based TVS device (72) provides an enhanced gain operation, while device (88) provides a top side drain contact. The high gain MOS based TVS devices provide increased control over clamp voltage variation.Type: GrantFiled: May 4, 2001Date of Patent: October 14, 2003Assignee: Semiconductor Components Industries LLCInventors: Francine Y. Robb, Jeffrey Pearse, David M. Heminger, Stephen P. Robb
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Patent number: 6504424Abstract: Depletion mode pass transistor (38) accepts input voltage Vin and provides regulated output voltage Vout. The regulated output voltage is referenced to the threshold voltage of MOSFET (40) and is directly proportional to the ratio of resistors (50 and 52). MOSFET (58) provides enabling and disabling of voltage regulator (54). Multiple voltage regulators (FIG. 5) having multiple output potentials are realized on the same semiconductor die producing the same threshold potential for MOSFET's (40), whereby the output potentials are selectable using the ratio of resistors 50 and 52. Constant current source (56) reduces output voltage variation due to input voltage variation.Type: GrantFiled: August 29, 2001Date of Patent: January 7, 2003Assignee: Semiconductor Components Industries LLCInventors: David M. Heminger, Stephen P. Robb, Margaret E. Fuchs
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Publication number: 20020163021Abstract: A method of providing a Transient Voltage Suppression (TVS) device is described utilizing a Metal Oxide Semiconductor (MOS) structure and an Insulated Gate Bipolar Transistor (IGBT) structure. The MOS based TVS devices offer reduced leakage current with reduced clamp voltages between 0.5 and 5 volts. Trench MOS based TVS device (72) provides an enhanced gain operation, while device (88) provides a top side drain contact. The high gain MOS based TVS devices provide increased control over clamp voltage variation.Type: ApplicationFiled: May 4, 2001Publication date: November 7, 2002Applicant: Semiconductor Components Industries LLCInventors: Francine Y. Robb, Jeffrey Pearse, David M. Heminger, Stephen P. Robb
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Patent number: 5751052Abstract: An inductive driver circuit (10) has a driver transistor (11) that is used for driving loads. An input protection device (13) and a voltage suppression device (12) assist in protecting the transistor (11). The circuit (10), including the driver transistor (11) and the input protection device (13), are formed in a common collector region.Type: GrantFiled: April 1, 1996Date of Patent: May 12, 1998Assignee: Motorola, Inc.Inventors: David M. Heminger, Vincent L. Mirtich, William H. Grant
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Patent number: 5751025Abstract: A current limiter (15) is formed between a silicon substrate (10) and a source region (17) by a channel implant region (20). The channel implant region (20) is not modulated by a gate structure so the maximum voltage that can flow between the silicon substrate (10) and the source region (17) is determined by the doping profile of the ever-present channel implant region (20). A pinch-off structure (12) is used to form a depletion region which can support a large voltage potential between the silicon substrate (10) and the source region (17). In an alternate embodiment, a bipolar device is formed such that a limited current flow can be directed into a base region (32) which is used to modulate a current flow between silicon substrate (30) and an emitter region (38). Using the current limiters (15,35) it is possible to form an AC current limiter (50) that will limit the current flow regardless of the polarity of the voltage placed across two terminals (51,52).Type: GrantFiled: January 2, 1997Date of Patent: May 12, 1998Assignee: Motorola, Inc.Inventors: David M. Heminger, Joseph H. Slaughter
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Patent number: 5686857Abstract: A triac (100) utilizes an FET (107) to inhibit firing of a transistor (112) that forms a portion of the SCR of the triac (100). A DMOS transistor (106) is used to supply a substantially constant bias current to the transistor (107) in order to facilitate rapid turn-on of the transistor (107) around the zero-crossing of the voltage applied to the triac (100).Type: GrantFiled: February 6, 1996Date of Patent: November 11, 1997Assignee: Motorola, Inc.Inventors: David M. Heminger, Paul G. Alonas, William M. Coppock
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Patent number: 5629536Abstract: A current limiter (15) is formed between a silicon substrate (10) and a source region (17) by a channel implant region (20). The channel implant region (20) is not modulated by a gate structure so the maximum voltage that can flow between the silicon substrate (10) and the source region (17) is determined by the doping profile of the ever-present channel implant region (20). A pinch-off structure (12) is used to form a depletion region which can support a large voltage potential between the silicon substrate (10) and the source region (17). In an alternate embodiment, a bipolar device is formed such that a limited current flow can be directed into a base region (32) which is used to modulate a current flow between silicon substrate (30) and an emitter region (38). Using the current limiters (15, 35) it is possible to form an AC current limiter (50) that will limit the current flow regardless of the polarity of the voltage placed across two terminals (51, 52).Type: GrantFiled: November 21, 1995Date of Patent: May 13, 1997Assignee: Motorola, Inc.Inventors: David M. Heminger, Joseph H. Slaughter
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Patent number: 5391997Abstract: An optically isolated N-channel MOSFET driver turns on a MOSFET device in response to an optical input signal to drive a load. The turn-on time of the MOSFET is enhanced by a current boost circuit. As the MOSFET transcends to an on state and delivers current to the load, the voltage across the device diminishes and causes the current boost circuit to become inactive thus reducing to zero the current drain consumed by the current boost circuit. A photovoltaic array maintains the MOSFET operation. An optically isolated SCR is respondent to the absence of a light signal to turn off the MOSFET. Furthermore, the optical decoupling of the SCR, between the gate and source of the MOSFET device, is arranged to provide enhanced noise immunity. A voltage clamping circuit coupled between the gate and source of the MOSFET device provides additional protection to the device from large over voltages.Type: GrantFiled: October 28, 1993Date of Patent: February 21, 1995Assignee: Motorola, Inc.Inventors: Brian D. Meyer, David M. Heminger, Joseph H. Slaughter, III
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Patent number: 5198701Abstract: A current source with adjustable temperature compensation in which the level of current supplied to a load is adjusted to compensate for the load's inherent change in performance with changes in temperature. The current source allows selection of the appropriate temperature compensating characteristic and operating current solely by altering internal component values.Type: GrantFiled: December 24, 1990Date of Patent: March 30, 1993Inventors: Robert B. Davies, Lloyd H. Hayes, David M. Heminger, David F. Mietus
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Patent number: 4961097Abstract: An improved photo detector is provided by forming a tub of monocrystalline semiconductor material surrounded by a layer of monocrystalline material of opposite conductivity type. The improved structure is manufactured by means of a modified DIC process. The device may by made deep enough to absorb a large portion of the incident radiation near the PN junction without sacrificing a large number of photo-generated carriers to recombination.Type: GrantFiled: March 11, 1985Date of Patent: October 2, 1990Assignee: Motorola Inc.Inventors: Hassan Pirastehfar, George C. Onodera, Waisiu Law, David M. Heminger