Patents by Inventor David M. Ratchkov

David M. Ratchkov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150269304
    Abstract: A system is described that analyzes timing of a design and conditionally replaces values of a cell to lower total power within circuit paths having a positive timing margin. The system includes a computing device that includes a memory for storing modules and a processor that is operable to execute the modules. The modules cause the processor to conditionally replace a first semiconductor characteristic with a second semiconductor characteristic associated with a cell in a path of a circuit design and estimating a delay and a slack of the path based upon the first semiconductor characteristic. The modules also cause the processor to determine whether the second semiconductor characteristic causes a timing violation with respect to the path and causes conditional replacement of the second semiconductor characteristic with a third semiconductor characteristic until the timing violation is removed.
    Type: Application
    Filed: March 21, 2014
    Publication date: September 24, 2015
    Applicant: LSI Corporation
    Inventors: Bruce E. Zahn, David M. Ratchkov, Benjamin Mbouombouo
  • Patent number: 7829973
    Abstract: A decoupling circuit disposed between a first rail and a second rail, where a third power rail is disposed between the first and second rails. A resistor having a first electrode and a second electrode is disposed between the first and second rails. Two capacitors are disposed between the first and second rails. The resistor is connected to the third rail and the two capacitors. In this manner, the two capacitors are connected in series with respect to the resistor, and in parallel with respect to one another. A first of the two capacitors is connected to the first rail, and a second of the two capacitors is connected to the second rail. At least one of the resistor and the two capacitors is disposed at least in part beneath the third rail.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: November 9, 2010
    Assignee: LSI Corporation
    Inventors: Richard T. Schultz, Thomas R. O'Brien, Viswanathan Lakshmanan, David M. Ratchkov, Stefan G. Block
  • Publication number: 20090051006
    Abstract: A decoupling circuit disposed between a first rail and a second rail, where a third power rail is disposed between the first and second rails. A resistor having a first electrode and a second electrode is disposed between the first and second rails. Two capacitors are disposed between the first and second rails. The resistor is connected to the third rail and the two capacitors. In this manner, the two capacitors are connected in series with respect to the resistor, and in parallel with respect to one another. A first of the two capacitors is connected to the first rail, and a second of the two capacitors is connected to the second rail. At least one of the resistor and the two capacitors is disposed at least in part beneath the third rail.
    Type: Application
    Filed: August 23, 2007
    Publication date: February 26, 2009
    Applicant: LSI CORPORATION
    Inventors: Richard T. Schultz, Thomas R. O'Brien, Viswanathan Lakshmanan, David M. Ratchkov, Stefan G. Block