Abstract: Fuel cells equipped with a self-contained gas- or air-lift which circulates fuel through the channels of the separator plate of the fuel cell via gaseous carbon dioxide produced by the reaction of the membrane electrode assembly and the fuel are provided. Also provided are exemplary self-contained gas-or air-lifts useful for production of these fuel cells.

Abstract: Circuits and methods are provided that compensate for dynamic errors caused by voltage drops across a switch coupled in series with a capacitor in an electrical circuit such as a track-and-hold circuit. In such circuits, the capacitor should provide the same voltage as a signal coupled to the switch, but does not because of the switch voltage drop. The switch can be, for example, a MOSFET or more particularly a CMOS device. Dynamic errors are compensated for by measuring the voltage drop across the switch and then effectively adding the measured voltage drop to a voltage provided by the capacitor.

Abstract: Improved pipelined successive approximation analog-to-digital converter circuits are provided. Some embodiments of the present invention comprises two stages in which a first portion of the total bits are evaluated in the first stage of the circuit and then the residue is passed to the second stage of the circuit that evaluates the remaining portion. By operating both stages simultaneously, the throughput is increased. These embodiments utilize two matched buffers to isolate the first and second stages from switching errors of a sampling circuit and the loading effects of comparators associated with the two stages. In another embodiment, upon completion of the conversion of the MSBs, the remaining input signal or residue signal is amplified by a preamp and the output is subsequently sampled by a residue sample and hold circuit (S/H). After the residue is sampled by the residue S/H, the second stage begins to solve the least significant bits (LSBs). The second stage is a matched copy of the first stage.

Abstract: A method for rapid manufacturing multi-pane insulating glass windows where cooling gas is used to cool temperature activated adhesive or sealant on pane spacers thereby reducing the assembly time for windows used to replace broken windows in emergency conditions

Abstract: An analog-to-digital converter circuit (ADC) is described which comprises capacitor based digital-to-analog converter circuits (CDACs) coupled to the inputs of a voltage comparator wherein a reference voltage of one CDAC section has been scaled with respect to a reference voltage of another CDAC section such that one CDAC section adds additional resolution to the other CDAC section. The invention may be applied to single input ADCs as well as to differential ADCs with either type operating in either unipolar or bipolar mode. Also described are various known approaches to both single input and differential CDAC-based successive approximation ADCs, as well as a novel technique of capacitive input voltage attenuation for differential ADCs.

Abstract: A method and apparatus for improving the linearity of an analog signal in a fiber optic transmission system in which copies of the analog signal are provided to a remote receiver and to a feedback receiver, and in which the copy to the feedback receiver is attenuated so that the signal received at the feedback receiver is substantially similar to the signal received at the remoter receiver. An amplifier subtractively combines the signal from the feedback receiver and the analog signal to thereby provide a signal that pre-compensates for non-linearities that would be encountered by a transmission through the system. The feedback receiver and the remote receiver are substantially similar in operation so that the feedback loop substantially duplicates the environment of the transmission.

Abstract: A method and system for improving the linearity of an analog transmission in a multichannel fiber optic transmission system uses a power series correction derived from a non-information bearing portion of a received transmission. A notch filter reduces the energy in a portion of a guard band between channels before transmission so that the energy in the notch-filtered portion of the received transmission is indicative of the non-linearities introduced by the analog transmission system. The energy of the notch-filtered portion of a received transmission is represented by a power series that is inverted and provided as a correction to the received transmission.

Abstract: A subranging analog-to-digital converter (ADC) that comprises a biasing architecture including a single string of transistor current sources used to generate the reference digital-to-analog converter (DAC) bit currents, the low-resolution flash ADC reference ladder voltage, and the ADC bipolar offset voltage. The reference DAC resistors, low resolution voltage reference ladder resistors, error amplifier gain set resistors, and the bipolar offset resistors are all constructed from the same material and using the same physical construction, so that they match with high precision and track over process and temperature. In one embodiment, the low-resolution flash ADC is itself implemented as a two-step parallel subranging ADC, comprising a most-significant-bit reference ladder and a least-significant-bit reference ladder, and includes an internal flash DAC whose bit currents are also provided by the same single string of transistor current sources.

Abstract: In one embodiment, a successive approximation analog-to-digital converter having a main CDAC and a trim CDAC includes resistors in the main CDAC connected in series with various bit switch FETs. The resistors are precisely matched to equivalent resistances of trimmable voltage divider circuits connected in series with various corresponding bit switch FETs in the trim DAC, to prevent non-linear parasitic capactiance and voltage-current properties of first and second clamping FETs from "unbalancing" the voltages on the charge summing conductors of the main DAC and the trim DAC during turn-off of the first and second clamping FETs after they have been turned on to equalize the voltages of the charge summing conductors. In another embodiment, separate trim and dummy DACs are provided to improve the accuracy to which the resistances in the main CDAC and trim CDAC can, as a practical matter, be matched.

Abstract: A two-terminal temperature-compensated current source includes a first transistor having its emitter connected to a first terminal, its base connected to the base of a second transistor, and its collector coupled to a current mirror. The second transistor has its emitter coupled to the first terminal by a first resistor and its collector coupled to the current mirror. A second resistor is coupled between the first terminal and the base of the first transistor. The current mirror is coupled between a second terminal and the collectors of the first and second transistors so that all current supplied to the current mirror from the second terminal flows into the collectors of the first and second transistors. A third transistor has its base coupled to the collector of the first transistor, its emitter coupled to the base of the first transistor, and its collector coupled to the second terminal.

Abstract: Disclosed is a system for high speed conversion of radar formats from polar coordinates to cartesian coordinates. From an initial address X.sub.i Y.sub.i where a radar pulse crosses a display, subsequent addresses are determined by adding constant values sin .theta..sub.i and cos .theta..sub.i to X.sub.i and Y.sub.i. This is faster than the prior method of calculating x.sub.i and Y.sub.i by multiplying R.sub.i (range) by sin .theta..sub.i and cos .theta..sub.i. Also disclosed is a system for filling the display between adjacent radials at long ranges where spoking of the display tends to occur. This is done by adding constant increments to one cartesian value on one vector until the next vector is reached while maintaining the other cartesian value constant.

Abstract: Disclosed is a cell to word buffer for use in a digital TV display radar system in which radar pulse returns are digitized by an analog to digital converter to form pixel data, polar coordinates of the pulse returns are converted to their equivalent X, Y cartesian coordinates by a coordinate converter and the pixel data are stored in an X, Y refresh memory array in accordance with their X, Y coordinates for use in refreshing a TV display. The cell to word buffer allows large offsets in high resolution radar scan converters. The cell to word buffer memory means is located intermediate the coordinate converter and refresh memory for temporarily storing, for each Y location, a plurality of groups of adjacent pixel data and their associated X addresses and for transferring each group of pixel data to its appropriate location in the refresh memory when each group in the buffer memory is filled with pixel data.