Patents by Inventor David Matthew Springberg

David Matthew Springberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Operation based on consolidated memory region description data
    Patent number: 12461680
    Abstract: Various embodiments enable a memory sub-system to perform a read operation based on consolidated memory region description data, which can be generated based on a memory region description data (e.g., SGL) provided by a host system for the read operation.
    Type: Grant
    Filed: June 4, 2024
    Date of Patent: November 4, 2025
    Assignee: Micron Technology, Inc.
    Inventor: David Matthew Springberg
  • Compression-based data operations in a memory device
    Patent number: 12222805
    Abstract: A processing device receives a request to write data to a memory device. The processing device generates a codeword based on the data. The codeword comprises the data and error correction code. The processing device generates a compressed codeword by compressing the codeword. The processing device stores the compressed codeword on a page of the memory device.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: February 11, 2025
    Assignee: Micron Technology, Inc.
    Inventor: David Matthew Springberg
  • OPERATION BASED ON CONSOLIDATED MEMORY REGION DESCRIPTION DATA
    Publication number: 20240319912
    Abstract: Various embodiments enable a memory sub-system to perform a read operation based on consolidated memory region description data, which can be generated based on a memory region description data (e.g., SGL) provided by a host system for the read operation.
    Type: Application
    Filed: June 4, 2024
    Publication date: September 26, 2024
    Inventor: David Matthew Springberg
  • Operation based on consolidated memory region description data
    Patent number: 12026395
    Abstract: Various embodiments enable a memory sub-system to perform a read operation based on consolidated memory region description data, which can be generated based on a memory region description data (e.g., SGL) provided by a host system for the read operation.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: July 2, 2024
    Assignee: Micron Technology, Inc.
    Inventor: David Matthew Springberg
  • COMPRESSION-BASED DATA OPERATIONS IN A MEMORY DEVICE
    Publication number: 20230195571
    Abstract: A processing device receives a request to write data to a memory device. The processing device generates a codeword based on the data. The codeword comprises the data and error correction code. The processing device generates a compressed codeword by compressing the codeword. The processing device stores the compressed codeword on a page of the memory device.
    Type: Application
    Filed: February 16, 2023
    Publication date: June 22, 2023
    Inventor: David Matthew Springberg
  • Compression-based data operations in a memory device
    Patent number: 11599414
    Abstract: A processing device receives a request to write data to a memory device. The processing device generates a codeword based on the data. The codeword comprises the data and error correction code. The processing device generates a compressed codeword by compressing the codeword. The processing device stores the compressed codeword on a page of the memory device.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: March 7, 2023
    Assignee: Micron Technology, Inc.
    Inventor: David Matthew Springberg
  • OPERATION BASED ON CONSOLIDATED MEMORY REGION DESCRIPTION DATA
    Publication number: 20220413749
    Abstract: Various embodiments enable a memory sub-system to perform a read operation based on consolidated memory region description data, which can be generated based on a memory region description data (e.g., SGL) provided by a host system for the read operation.
    Type: Application
    Filed: August 26, 2022
    Publication date: December 29, 2022
    Inventor: David Matthew Springberg
  • Power management integrated circuit with embedded address resolution protocol circuitry
    Patent number: 11474705
    Abstract: Disclosed is a power management integrated circuit with embedded address resolution protocol functionality. In one embodiment, a device is disclosed comprising a data storage device; and an address resolution protocol (ARP) state machine communicatively coupled to the data storage device and included within a power management integrated circuit (PMIC), the ARP state machine configured to assign an address to the data storage device and validate requests for data stored in the data storage device received over a bus.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: October 18, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Matthew David Rowley, David Matthew Springberg, Dustin James Carter
  • COMPRESSION-BASED DATA OPERATIONS IN A MEMORY DEVICE
    Publication number: 20220308959
    Abstract: A processing device receives a request to write data to a memory device. The processing device generates a codeword based on the data. The codeword comprises the data and error correction code. The processing device generates a compressed codeword by compressing the codeword. The processing device stores the compressed codeword on a page of the memory device.
    Type: Application
    Filed: March 29, 2021
    Publication date: September 29, 2022
    Inventor: David Matthew Springberg
  • Operation based on consolidated memory region description data
    Patent number: 11449272
    Abstract: Various embodiments enable a memory sub-system to perform a read operation based on consolidated memory region description data, which can be generated based on a memory region description data (e.g., SGL) provided by a host system for the read operation.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: September 20, 2022
    Assignee: Micron Technology, Inc.
    Inventor: David Matthew Springberg
  • OPERATION BASED ON CONSOLIDATED MEMORY REGION DESCRIPTION DATA
    Publication number: 20220291860
    Abstract: Various embodiments enable a memory sub-system to perform a read operation based on consolidated memory region description data, which can be generated based on a memory region description data (e.g., SGL) provided by a host system for the read operation.
    Type: Application
    Filed: March 9, 2021
    Publication date: September 15, 2022
    Inventor: David Matthew Springberg
  • Managing host communication with a regulator in a low power mode
    Patent number: 10891062
    Abstract: A solid-state drive (SSD) includes a connector communicatively coupling the SSD to a host device, a controller coupled to the connector, and a memory device. The SSD also include a regulator configured to receive an instruction to enter a low power mode of the SSD, enter the low power mode upon receipt of the instruction, receive an indication to exit the low power mode, and exit the low power mode upon receipt of the indication.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: January 12, 2021
    Assignee: Micron Technology, Inc.
    Inventors: David Matthew Springberg, Matthew David Rowley, Peter Edward Kaineg
  • POWER MANAGEMENT INTEGRATED CIRCUIT WITH EMBEDDED ADDRESS RESOLUTION PROTOCOL CIRCUITRY
    Publication number: 20200348856
    Abstract: Disclosed is a power management integrated circuit with embedded address resolution protocol functionality. In one embodiment, a device is disclosed comprising a data storage device; and an address resolution protocol (ARP) state machine communicatively coupled to the data storage device and included within a power management integrated circuit (PMIC), the ARP state machine configured to assign an address to the data storage device and validate requests for data stored in the data storage device received over a bus.
    Type: Application
    Filed: July 17, 2020
    Publication date: November 5, 2020
    Inventors: Matthew David Rowley, David Matthew Springberg, Dustin James Carter
  • Power management integrated circuit with embedded address resolution protocol circuitry
    Patent number: 10719241
    Abstract: Disclosed is a power management integrated circuit with embedded address resolution protocol functionality. In one embodiment, a device is disclosed comprising a data storage device; and an address resolution protocol (ARP) state machine communicatively coupled to the data storage device and included within a power management integrated circuit (PMIC), the ARP state machine configured to assign an address to the data storage device and validate requests for data stored in the data storage device received over a bus.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: July 21, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Matthew David Rowley, David Matthew Springberg, Dustin James Carter
  • Power Management Integrated Circuit with Embedded Address Resolution Protocol Circuitry
    Publication number: 20190361613
    Abstract: Disclosed is a power management integrated circuit with embedded address resolution protocol functionality. In one embodiment, a device is disclosed comprising a data storage device; and an address resolution protocol (ARP) state machine communicatively coupled to the data storage device and included within a power management integrated circuit (PMIC), the ARP state machine configured to assign an address to the data storage device and validate requests for data stored in the data storage device received over a bus.
    Type: Application
    Filed: May 25, 2018
    Publication date: November 28, 2019
    Inventors: Matthew David Rowley, David Matthew Springberg, Dustin James Carter
  • MANAGING HOST COMMUNICATION WITH A REGULATOR IN A LOW POWER MODE
    Publication number: 20190107966
    Abstract: A solid-state drive (SSD) includes a connector communicatively coupling the SSD to a host device, a controller coupled to the connector, and a memory device. The SSD also include a regulator configured to receive an instruction to enter a low power mode of the SSD, enter the low power mode upon receipt of the instruction, receive an indication to exit the low power mode, and exit the low power mode upon receipt of the indication.
    Type: Application
    Filed: December 5, 2018
    Publication date: April 11, 2019
    Inventors: David Matthew Springberg, Matthew David Rowley, Peter Edward Kaineg
  • Managing host communication with a regulator in a low power mode
    Patent number: 10175902
    Abstract: A solid-state drive (SSD) includes a connector communicatively coupling the SSD to a host device, a controller coupled to the connector, and a memory device. The SSD also include a regulator configured to receive an instruction to enter a low power mode of the SSD, enter the low power mode upon receipt of the instruction, receive an indication to exit the low power mode, and exit the low power mode upon receipt of the indication.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: January 8, 2019
    Assignee: Micron Technology, Inc..
    Inventors: David Matthew Springberg, Matthew David Rowley, Peter Edward Kaineg
  • MANAGING HOST COMMUNICATION WITH A REGULATOR IN A LOW POWER MODE
    Publication number: 20170371574
    Abstract: A solid-state drive (SSD) includes a connector communicatively coupling the SSD to a host device, a controller coupled to the connector, and a memory device. The SSD also include a regulator configured to receive an instruction to enter a low power mode of the SSD, enter the low power mode upon receipt of the instruction, receive an indication to exit the low power mode, and exit the low power mode upon receipt of the indication.
    Type: Application
    Filed: June 27, 2016
    Publication date: December 28, 2017
    Inventors: David Matthew Springberg, Matthew David Rowley, Peter Edward Kaineg