Abstract: A perforating gun with a self-orienting charge cartridge for use in oil and gas completions operations. A gun string including the perforating gun and one or more additional perforating guns substantially identical to the perforating gun.

Abstract: Techniques for expressing, communicating, de-conflicting, and enforcing consistent access policies between an IBN architecture and a Cloud-Native architecture. Generally, network administrators and/or users of a Cloud-Native architecture and an IBN architecture express access policies independently for the two different domains or architectures. According to the techniques described herein, a Network Service Endpoint (NSE) of the Cloud-Native architecture may exchange access policies with a network device of the IBN architecture. After exchanging access policies, conflicts between the sets of access policies may be identified, such as differences between allowing or denying communications between microservices and/or applications. The conflicts may be de-conflicted using various types of heuristics or rules, such as always selecting an access policy of the IBN architecture when conflicts arise.

Abstract: This disclosure describes a kit comprising component for removing, replacing, and/or sealing toilet parts. In some embodiments, the kit comprises a flush valve assembly, fill valve assembly, a handle assembly, two tools, two gaskets, and packaging that also serves as one or more water containers. In some embodiments, the two gaskets are two conventional gaskets that can be combined to make a third gasket. In some embodiments, the combination of the two gaskets allows the creation of a synergistic gasket for sealing a tank-to-bowl interface than neither gasket could seal individually.

Abstract: For risk evaluation, a method encodes event data as a linear array that includes a plurality of logic states. The method estimates a success probability for each logic state and identifies path groups of the plurality of logic states. The logic states of each path group must all be healthy for each logic state to contribute to system success. The method further identifies each path combination of path groups and path nodes that result in system success. In addition, the method calculates a system success probability as a sum of success probabilities for each path combination. The success rate for each path combination is calculated as a product of the path group success probabilities for the path combination.

Abstract: For implementing a logic design, a method encodes a logic design as a linear array that includes a plurality of logic states. The method calculates a combination map for a state transition between a start state and an end state of the plurality of logic states using the linear array to reduce computational overhead. In addition, the method identifies undefined binary input variable transitions for the state transition on the combination map. The method resolves the undefined binary input variable transitions in the linear array. The method generates a final logic design comprising Boolean logic from the linear array with the resolved binary input variable transitions. The method implements the final logic design in hardware by generating semiconductor gates that implement the Boolean logic.

Abstract: For exceptional logic element management, a method encodes a logic design as a linear array that includes a plurality of logic states. Each logic state includes one or more binary output variables, one or more binary input variables, one or more minterms of the one or more binary input variables, one or more maxterms of the one or more minterms, one or more present state values, and one or more next state values. The method identifies an exceptional logic element, wherein the exceptional logic element comprises one or more of an exceptional logic state, an exceptional state transition, and an exceptional input combination. In addition, the code displays the plurality of logic states excluding the exceptional logic elements from display.

Abstract: For parsing source code into a linear array, a method parses source code into a plurality of logic design elements. The method further identifies conditional logic for each logic design element. In addition, the method identifies computation logic for each logic design element. The method encodes each logic design element as a logic state of a plurality of logic states in a linear array. Each logic state includes one or more binary output variables, one or more binary input variables, one or more minterms of the one or more binary input variables, one or more maxterms of the one or more minterms, one or more present state values, and one or more next state values. The method reduces the logic relationships to a Boolean equation. The method generates one of output source code and a hardware implementation from the Boolean equation.

Abstract: This disclosure describes a kit comprising component for removing, replacing, and/or sealing toilet parts. In some embodiments, the kit comprises a flush valve assembly, fill valve assembly, a handle assembly, two tools, two gaskets, and packaging that also serves as one or more water containers. In some embodiments, the two gaskets are two conventional gaskets that can be combined to make a third gasket. In some embodiments, the combination of the two gaskets allows the creation of a synergistic gasket for sealing a tank-to-bowl interface than neither gasket could seal individually.

Abstract: For generating path execution times, a method encodes a logic design as a linear array that includes a plurality of logic states. Each logic state includes one or more binary output variables, one or more binary input variables, one or more minterms of the one or more binary input variables, one or more maxterms of the one or more minterms, one or more present state values, and one or more next state values. The method iteratively generates a path execution time for each path between a start state and an end state. The method further generates a maximum path execution time between the start state and the end state as a greatest sum of all path execution times between the start state and the end state.

Abstract: For combination map based design, a method defines one or more logic elements including one or more binary output variables and one or more binary input variables. The method further assigns the one or more logic elements to a combination map. In addition, the method defines one or more logic element relationships between the logic elements on the combination map. The method encodes a plurality of fields of the combination map as a linear array that includes a plurality of logic states. Each logic state includes the one or more binary output variables, the one or more binary input variables, one or more minterms of the one or more binary input variables, one or more maxterms of the one or more minterms, one or more present state values, and one or more next state values.

Abstract: A system and method for functioning as a companion robot (11) to provide services to a user, collect data and information about the local environment to the robot and the user, and communicate with the user and to a remote processing means. A plurality of sensors are adapted to: (i) probe an environment in which the companion robot and user is disposed and generate data in respect of the environment; and sense information about the user and generate data containing the information. A communication means communicates: (i) sensorially perceptive information to the user; and (ii) data containing information to a remote processing means. A processing means: (i) receives data from the sensors; (ii) processes the data to extract information therefrom and perform prescribed functions with the information; and (iii) provides output information and data to the communication means.

Abstract: For parsing source code into a linear array, a method parses source code into a plurality of logic design elements. The method further identifies conditional logic for each logic design element. In addition, the method identifies computation logic for each logic design element. The method encodes each logic design element as a logic state of a plurality of logic states in a linear array. Each logic state includes one or more binary output variables, one or more binary input variables, one or more minterms of the one or more binary input variables, one or more maxterms of the one or more minterms, one or more present state values, and one or more next state values. The method reduces the logic relationships to a Boolean equation. The method generates one of output source code and a hardware implementation from the Boolean equation.

Abstract: For parsing source code into a linear array, a method parses source code into a plurality of logic design elements. The method further identifies conditional logic for each logic design element. In addition, the method identifies computation logic for each logic design element. The method encodes each logic design element as a logic state of a plurality of logic states in a linear array. Each logic state includes one or more binary output variables, one or more binary input variables, one or more minterms of the one or more binary input variables, one or more maxterms of the one or more minterms, one or more present state values, and one or more next state values. The method reduces the logic relationships to a Boolean equation. The method generates one of output source code and a hardware implementation from the Boolean equation.

Abstract: For exceptional logic element management, a method encodes a logic design as a linear array that includes a plurality of logic states. Each logic state includes one or more binary output variables, one or more binary input variables, one or more minterms of the one or more binary input variables, one or more maxterms of the one or more minterms, one or more present state values, and one or more next state values. The method identifies an exceptional logic element, wherein the exceptional logic element comprises one or more of an exceptional logic state, an exceptional state transition, and an exceptional input combination. In addition, the code displays the plurality of logic states excluding the exceptional logic elements from display.

Abstract: For generating path execution times, a method encodes a logic design as a linear array that includes a plurality of logic states. Each logic state includes one or more binary output variables, one or more binary input variables, one or more minterms of the one or more binary input variables, one or more maxterms of the one or more minterms, one or more present state values, and one or more next state values. The method iteratively generates a path execution time for each path between a start state and an end state. The method further generates a maximum path execution time between the start state and the end state as a greatest sum of all path execution times between the start state and the end state.

Abstract: For implementing a logic design, a method encodes a logic design as a linear array that includes a plurality of logic states. The method calculates a combination map for a state transition between a start state and an end state of the plurality of logic states using the linear array to reduce computational overhead. In addition, the method identifies undefined binary input variable transitions for the state transition on the combination map. The method resolves the undefined binary input variable transitions in the linear array. The method generates a final logic design comprising Boolean logic from the linear array with the resolved binary input variable transitions. The method implements the final logic design in hardware by generating semiconductor gates that implement the Boolean logic.

Abstract: For risk evaluation, a method encodes event data as a linear array that includes a plurality of logic states. The method estimates a success probability for each logic state and identifies path groups of the plurality of logic states. The logic states of each path group must all be healthy for each logic state to contribute to system success. The method further identifies each path combination of path groups and path nodes that result in system success. In addition, the method calculates a system success probability as a sum of success probabilities for each path combination. The success rate for each path combination is calculated as a product of the path group success probabilities for the path combination.

Abstract: For parsing source code into a linear array, a method parses source code into a plurality of logic design elements. The method further identifies conditional logic for each logic design element. In addition, the method identifies computation logic for each logic design element. The method encodes each logic design element as a logic state of a plurality of logic states in a linear array. Each logic state includes one or more binary output variables, one or more binary input variables, one or more minterms of the one or more binary input variables, one or more maxterms of the one or more minterms, one or more present state values, and one or more next state values. The method reduces the logic relationships to a Boolean equation. The method generates one of output source code and a hardware implementation from the Boolean equation.

Abstract: For combination map based design, a method defines one or more logic elements including one or more binary output variables and one or more binary input variables. The method further assigns the one or more logic elements to a combination map. In addition, the method defines one or more logic element relationships between the logic elements on the combination map. The method encodes a plurality of fields of the combination map as a linear array that includes a plurality of logic states. Each logic state includes the one or more binary output variables, the one or more binary input variables, one or more minterms of the one or more binary input variables, one or more maxterms of the one or more minterms, one or more present state values, and one or more next state values.

Abstract: A method for computer security. A gallery comprising a first identity of a first human person is maintained, the first identity associated with a plurality of tags, with first properties, useful for identifying the first human person. A first Internet search for facial images of the first human person is performed using the plurality of tags. A first facial image is selected from the results of this search. A second Internet search is performed for facial images of other human persons based on second properties that are generated by modifying the first properties of the plurality of tags. A plurality of additional facial images of the other human persons retrieved by the second Internet search is selected. A palette of randomized facial images including the first facial image together with the plurality of additional facial images is presented. Access is denied unless the correct facial image is selected.