Patents by Inventor David Mitford Gillies

David Mitford Gillies has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10521208
    Abstract: A mechanism for generating optimized native code for a program having dynamic behavior uses a static analysis of the program to predict the likelihood that different elements of the program are likely to be used when the program executes. The static analysis is performed prior to execution of the program and marks certain elements of the program with confidence indicators that classify the elements with either a high level of confidence or a low level of confidence. The confidence indicators are then used by an ahead-of-time native compiler to generate native code and to optimize the code for faster execution and/or a smaller-sized native code.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: December 31, 2019
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.
    Inventors: Morgan Asher Brown, David Charles Wrighton, Mei-Chin Tsai, Shah Mohammad Faizur Rahman, Yi Zhang, Ian M. Bearman, Erdembilegt Janchivdorj, David Adam Hartglass, David Mitford Gillies
  • Publication number: 20180373515
    Abstract: A mechanism for generating optimized native code for a program having dynamic behavior uses a static analysis of the program to predict the likelihood that different elements of the program are likely to be used when the program executes. The static analysis is performed prior to execution of the program and marks certain elements of the program with confidence indicators that classify the elements with either a high level of confidence or a low level of confidence. The confidence indicators are then used by an ahead-of-time native compiler to generate native code and to optimize the code for faster execution and/or a smaller-sized native code.
    Type: Application
    Filed: June 23, 2017
    Publication date: December 27, 2018
    Inventors: MORGAN ASHER BROWN, DAVID CHARLES WRIGHTON, MEI-CHIN TSAI, SHAH MOHAMMAD FAIZUR RAHMAN, YI ZHANG, IAN M. BEARMAN, ERDEMBILEGT JANCHIVDORJ, DAVID ADAM HARTGLASS, DAVID MITFORD GILLIES
  • Patent number: 7707566
    Abstract: A software development architecture is provided for constructing a wide range of software development tools. A software development tool can be created by integrating a specification specifying functionality specific to a set of software development scenarios into a software development scenario-independent framework. The integrated specification can then be compiled to create the software development tool. Alternatively, integration can be achieved at runtime without access to source code. The architecture can use any combination of the following: a software scenario independent intermediate representation format, one or more exception handling models capable of supporting a plurality of programming language specific exception handling models, a type system capable of representing the type representations of a plurality of source languages, and a code generator capable of generating code targeted for a plurality of execution architectures.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: April 27, 2010
    Assignee: Microsoft Corporation
    Inventors: Vinod K. Grover, Charles L. Mitchell, David Mitford Gillies, Mark Leslie Roberts, Mark Ronald Plesko, David Read Tarditi, Jr., Andrew James Edwards, Julian Burger, Andrew Edward Ayers, Akella V. S. Sastry
  • Patent number: 7426719
    Abstract: Described is a system and method of regenerating stack unwind data in the presence of exceptions. The system is directed to generating metadata for use during stack unwinding. The system includes procedures, a first plurality of metadata, and an unwind rewriter. Each metadata is associated with a corresponding procedure in the procedures. The unwind rewriter generates new metadata from the first plurality of metadata in response to a modification of the sequence of binary instructions within a procedure, such that the new metadata accurately represents the modified sequence of binary instructions. The method regenerates metadata in response to a binary modification to a procedure by receiving a first group of metadata associated with the unmodified procedure, parsing the first group of metadata, and generating a second group of metadata that accurately represents the binary modification to the procedure.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: September 16, 2008
    Assignee: Microsoft Corporation
    Inventors: Ronnie Ira Chaiken, David Mitford Gillies
  • Patent number: 7350061
    Abstract: Described is a method that identifies a predicate expression representing conditions in predicated assembly language instructions that determine a direction of a conditional branch instruction. The predicate expression is employed to enable a transformation to be made that causes the conditional branch instruction to trigger, or execute, when an opposite condition is true. A method is directed to producing a binary-level conditional branch reversal within a binary program on a computer architecture that supports a predicated execution. The method includes obtaining a predicate expression representing a condition that influences a direction of program flow of the binary-level conditional branch to be reversed, determining a binary-level transformation that causes the binary-level conditional branch to be triggered when an opposite condition is true, and modifying the binary-level conditional branch with the determined binary-level transformation, wherein the binary-level conditional branch is reversed.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: March 25, 2008
    Assignee: Microsoft Corporation
    Inventors: David Mitford Gillies, Ronnie Ira Chaiken
  • Patent number: 7203936
    Abstract: Described is a method that identifies a predicate expression representing conditions in predicated assembly language instructions that determine a direction of a conditional branch instruction. The predicate expression is employed to enable a transformation to be made that causes the conditional branch instruction to trigger, or execute, when an opposite condition is true. A method is directed to producing a binary-level conditional branch reversal within a binary program on a computer architecture that supports a predicated execution. The method includes obtaining a predicate expression representing a condition that influences a direction of program flow of the binary-level conditional branch to be reversed, determining a binary-level transformation that causes the binary-level conditional branch to be triggered when an opposite condition is true, and modifying the binary-level conditional branch with the determined binary-level transformation, wherein the binary-level conditional branch is reversed.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: April 10, 2007
    Assignee: Microsoft Corporation
    Inventors: David Mitford Gillies, Ronnie Ira Chaiken
  • Publication number: 20040268309
    Abstract: A software development architecture is provided for constructing a wide range of software development tools. A software development tool can be created by integrating a specification specifying functionality specific to a set of software development scenarios into a software development scenario-independent framework. The integrated specification can then be compiled to create the software development tool. Alternatively, integration can be achieved at runtime without access to source code. The architecture can use any combination of the following: a software scenario independent intermediate representation format, one or more exception handling models capable of supporting a plurality of programming language specific exception handling models, a type system capable of representing the type representations of a plurality of source languages, and a code generator capable of generating code targeted for a plurality of execution architectures.
    Type: Application
    Filed: July 25, 2003
    Publication date: December 30, 2004
    Applicant: Microsoft Corporation
    Inventors: Vinod K. Grover, Charles L. Mitchell, David Mitford Gillies, Mark Leslie Roberts, Mark Ronald Plesko, David Read Tarditi, Andrew James Edwards, Julian Burger, Andrew Edward Ayers, Akella V.S. Sastry
  • Patent number: 6834383
    Abstract: Described is a method that identifies a predicate expression representing conditions in predicated assembly language instructions that determine a direction of a conditional branch instruction. The predicate expression is employed to enable a transformation to be made that causes the conditional branch instruction to trigger, or execute, when an opposite condition is true. A method is directed to producing a binary-level conditional branch reversal within a binary program on a computer architecture that supports a predicated execution. The method includes obtaining a predicate expression representing a condition that influences a direction of program flow of the binary-level conditional branch to be reversed, determining a binary-level transformation that causes the binary-level conditional branch to be triggered when an opposite condition is true, and modifying the binary-level conditional branch with the determined binary-level transformation, wherein the binary-level conditional branch is reversed.
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: December 21, 2004
    Assignee: Microsoft Corporation
    Inventors: David Mitford Gillies, Ronnie Ira Chaiken
  • Publication number: 20030101335
    Abstract: Described is a method that identifies a predicate expression representing conditions in predicated assembly language instructions that determine a direction of a conditional branch instruction. The predicate expression is employed to enable a transformation to be made that causes the conditional branch instruction to trigger, or execute, when an opposite condition is true. A method is directed to producing a binary-level conditional branch reversal within a binary program on a computer architecture that supports a predicated execution. The method includes obtaining a predicate expression representing a condition that influences a direction of program flow of the binary-level conditional branch to be reversed, determining a binary-level transformation that causes the binary-level conditional branch to be triggered when an opposite condition is true, and modifying the binary-level conditional branch with the determined binary-level transformation, wherein the binary-level conditional branch is reversed.
    Type: Application
    Filed: November 26, 2001
    Publication date: May 29, 2003
    Applicant: Microsoft Corporation
    Inventors: David Mitford Gillies, Ronnie Ira Chaiken
  • Publication number: 20030101380
    Abstract: Described is a system and method of regenerating stack unwind data in the presence of exceptions. The system is directed to generating metadata for use during stack unwinding. The system includes procedures, a first plurality of metadata, and an unwind rewriter. Each metadata is associated with a corresponding procedure in the procedures. The unwind rewriter generates new metadata from the first plurality of metadata in response to a modification of the sequence of binary instructions within a procedure, such that the new metadata accurately represents the modified sequence of binary instructions. The method regenerates metadata in response to a binary modification to a procedure by receiving a first group of metadata associated with the unmodified procedure, parsing the first group of metadata, and generating a second group of metadata that accurately represents the binary modification to the procedure.
    Type: Application
    Filed: November 29, 2001
    Publication date: May 29, 2003
    Applicant: Microsoft Corporation
    Inventors: Ronnie Ira Chaiken, David Mitford Gillies
  • Patent number: 6249910
    Abstract: An improved technique for incrementally updating a source code representation having cloned variable name definitions to static single assignment (SSA) form is described. The technique receives an intermediate representation of a source program in non-SSA form having one or more cloned variable name definitions that correspond to an original variable name. All the original variable names and their corresponding cloned variable names are collected. An iterative dominance frontier set for those nodes containing a cloned variable name definition or an original variable name definition is formed. This iterative dominance frontier set is then used to determine the nodes in which a single phi-function is inserted for each original variable name. Each use of an original variable name is changed to the cloned variable name that reaches the use. The arguments of the inserted phi-functions are then updated with the cloned variable names that reach the inserted phi-functions.
    Type: Grant
    Filed: May 4, 1998
    Date of Patent: June 19, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Dz-ching Ju, David Mitford Gillies, A. V. S. Sastry
  • Patent number: 6182284
    Abstract: A method and system for detecting and eliminating interferences between resources in SSA-form &phgr;-instructions so that an optimizing compiler can translate optimized SSA-form code back to non-SSA-form code. The method traverses the control flow graph associated with an SSA-form program or routine in order to analyze each &phgr;-instruction within the SSA-form program or routine. All possible pairs of resources associated with each &phgr;-instruction are analyzed for interference. Once all interferences have been detected, the method inserts copy instructions into the SSA-form intermediate-level code program or routine in order to eliminate the interferences.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: January 30, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Vugranam C. Sreedhar, Dz-ching Ju, David Mitford Gillies, Vatsa Santhanam