Patents by Inventor David Moreau

David Moreau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240125180
    Abstract: A mobile drilling rig is configured to drill boreholes into the ground about a drill site. To assist navigating the mobile drilling rig and other machines about the drill site, a material pile mapping system can be included that includes the borehole locations and an estimated material pile dimension associated with a material pile formed about the borehole from material removed during drilling of the borehole. The material pile dimension can be estimated from an estimated material pile volume of the material removed from the borehole.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 18, 2024
    Applicant: Caterpillar Inc.
    Inventors: Stéphane Filion, David Moreau
  • Publication number: 20240091745
    Abstract: A composite oxidation catalyst for use in an exhaust system for treating an exhaust gas produced by a vehicular compression ignition internal combustion engine is disclosed. The composite oxidation catalyst comprises a honeycomb flow-through substrate monolith and two catalyst washcoat zones arranged axially in series on and along the substrate surface.
    Type: Application
    Filed: October 25, 2023
    Publication date: March 21, 2024
    Inventors: Andrew CHIFFEY, Kieran COLE, Oliver COOPER, Christopher DALY, Lee GILBERT, Robert HANLEY, David MICALLEF, Francois MOREAU, Paul PHILLIPS, George PLATT
  • Publication number: 20240081798
    Abstract: An applicator (1) comprising: a body (2) defining a chamber (14) for storing an adhesive composition, and an outlet (16) for delivering the adhesive composition stored in the chamber (14), a piston (4) mobile in translation relative to the body (2), a drive element (6) mobile in rotation relative to the body (2), and configured to be releasably engaged with a guide (100, 200, 300) external to the applicator (1), wherein rotating the drive element (6) relative to the body (2) causes the piston (4) to translate relative to the body (2) so as to reduce a volume of the chamber (14) and force the adhesive composition out of the applicator (1) through the outlet (16).
    Type: Application
    Filed: January 18, 2022
    Publication date: March 14, 2024
    Applicant: Tissium
    Inventors: Miguel Lopes, Maria Pereira, David Moreau, Elisa Bitton
  • Publication number: 20230101529
    Abstract: An oil level measuring device has a distal end and a proximal end. The oil level measuring device includes an arm comprising a first channel and a second channel, an electronic oil level sensor comprising a measuring mean configured to measure the level of the oil in an oil pan and a connecting port, the measuring mean being hosted into the first channel of the arm, a dipstick hosted into the second channel of the arm and configured to dip into the oil in the oil pan.
    Type: Application
    Filed: September 30, 2022
    Publication date: March 30, 2023
    Applicant: VOLVO TRUCK CORPORATION
    Inventors: Lea SOLEILHAC, David MOREAU, Catherine CUINIER
  • Patent number: 10615255
    Abstract: A method of fabricating a semiconductor structure includes forming a plurality of semiconductor fins disposed on a semiconductor substrate, wherein at least one of the fins is an unwanted fin including a semiconductor material; providing a conformal protective layer over the plurality of semiconductor fins; forming a mask having an opening over the unwanted fin; removing a portion of the unwanted fin to expose a fin spike; oxidizing the fin spike to form an oxidized semiconductor material; and removing the oxidized semiconductor material to expose a fin base.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: April 7, 2020
    Assignees: INTERNATIONAL BUSINESS MACHINES CORPORATION, STMICROELECTRONICS, INC., SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Susan S. Fan, Dongseok Lee, David Moreau, Tenko Yamashita
  • Publication number: 20170236722
    Abstract: A method of fabricating a semiconductor structure includes forming a plurality of semiconductor fins disposed on a semiconductor substrate, wherein at least one of the fins is an unwanted fin including a semiconductor material; providing a conformal protective layer over the plurality of semiconductor fins; forming a mask having an opening over the unwanted fin; removing a portion of the unwanted fin to expose a fin spike; oxidizing the fin spike to form an oxidized semiconductor material; and removing the oxidized semiconductor material to expose a fin base.
    Type: Application
    Filed: February 12, 2016
    Publication date: August 17, 2017
    Inventors: Susan S. Fan, Dongseok Lee, David Moreau, Tenko Yamashita
  • Publication number: 20170030626
    Abstract: A cryogenic cooling manifold and methods incorporating a cryogenic cooling manifold for managing the gas layer(s) above a liquid cryogen to control cooling temperature-time profiles and ice formation for microliter and smaller samples that are plunged through the gas and into the liquid cryogen.
    Type: Application
    Filed: July 27, 2016
    Publication date: February 2, 2017
    Applicant: Mitegen, LLC
    Inventors: David Closs, Stephen Hollabaugh, Robert E. Thorne, Robert Newman, Benjamin A. Apker, Tian Xia, David Moreau
  • Patent number: 9287130
    Abstract: A method includes forming a plurality of fin elements above a substrate. A mask is formed above the substrate. The mask has an opening defined above at least one selected fin element of the plurality of fin elements. An ion species is implanted into the at least one selected fin element through the opening to increase its etch characteristics relative to the other fin elements. The at least one selected fin element is removed selectively relative to the other fin elements.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: March 15, 2016
    Assignees: GLOBALFOUNDRIES Inc., International Business Machines Corporation, STMicroelectronics, Inc.
    Inventors: Xiuyu Cai, Ajey Poovannummoottil Jacob, Ruilong Xie, Bruce Doris, Kangguo Cheng, Jason R. Cantone, Sylvie Mignot, David Moreau, Muthumanickam Sankarapandian, Pierre Morin, Su Chen Fan, Kisik Choi, Murat K. Akarvardar
  • Patent number: 8946896
    Abstract: A dielectric layer overlies a semiconductor substrate. The substrate has components and appropriate contacts formed therein. The dielectric layer electrically insulates the substrate and components from overlying conductive interconnect layers. A barrier layer is arranged over the dielectric layer to isolate the interconnect layers from other structures. A copper layer is then deposited over the barrier layer and thick interconnect lines having a first width and a first height are realized. Then, the barrier layer is etched using one of many alternative techniques. The barrier layer has a second width and a second height wherein the second width of the barrier liner is selected to be greater than the first width of the thick copper interconnect.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: February 3, 2015
    Assignee: STMicroelectronics, Inc.
    Inventors: David Moreau, Jerome Ciavatti
  • Publication number: 20110269610
    Abstract: A method of automatically manufacturing a filled packette having a closure where a film is advanced from a feed roller to a punch that produces a series of holes in the film. Individual closures are then positioned into each punched hole and ultrasonically welded into place. The film is folded and oriented vertically so that heat sealing may be used to form the side and bottom edges of individual pockets. The film is then clipped to form individual pockets and filed with the appropriate amount of desired material from a bulk feeder. The filled pockets may be sealed along the top edge to form a closed packette and die cut to form the final packette shape.
    Type: Application
    Filed: May 24, 2011
    Publication date: November 3, 2011
    Applicant: MARIETTA CORPORATION
    Inventors: David Moreau, Thomas Larkin
  • Publication number: 20110265429
    Abstract: A method of automatically manufacturing a filled packette having a closure where a film is advanced from a feed roller to a punch that produces a series of holes in the film. Individual closures are then positioned into each punched hole and ultrasonically welded into place. The film is folded and oriented vertically so that heat sealing may be used to form the side and bottom edges of individual pockets. The film is then clipped to form individual pockets and filed with the appropriate amount of desired material from a bulk feeder. The filled pockets may be sealed along the top edge to form a closed packette and die cut to form the final packette shape.
    Type: Application
    Filed: April 28, 2010
    Publication date: November 3, 2011
    Applicant: MARIETTA CORPORATION
    Inventors: David Moreau, Thomas Larkin
  • Publication number: 20100171219
    Abstract: A dielectric layer overlies a semiconductor substrate. The substrate has components and appropriate contacts formed therein. The dielectric layer electrically insulates the substrate and components from overlying conductive interconnect layers. A barrier layer is arranged over the dielectric layer to isolate the interconnect layers from other structures. A copper layer is then deposited over the barrier layer and thick interconnect lines having a first width and a first height are realized. Then, the barrier layer is etched using one of many alternative techniques. The barrier layer has a second width and a second height wherein the second width of the barrier liner is selected to be greater than the first width of the thick copper interconnect.
    Type: Application
    Filed: December 31, 2009
    Publication date: July 8, 2010
    Applicant: STMICROELECTRONICS, INC.
    Inventors: David Moreau, Jerome Ciavatti
  • Patent number: 6857027
    Abstract: A system and method are disclosed for detecting and preventing bridge loops in a relatively low cost bridge module designed for installation in a network hub. The bridge operates to monitor an intra-hub communication path of the network hub to detect bridge protocol data units transmitted by a switching fabric within the network hub. The bridge module stores a MAC source address of a bridge protocol data unit detected on the intra-hub communications path, and forwards the bridge protocol data unit through its external communication ports to respective network segments. The bridge module monitors its external communication ports for any data unit having a destination address matching a bridge multicast address. When a data unit having a destination address matching the bridge multicast address is detected, the bridge module compares the MAC source address of that data unit to the previously stored MAC source address from the bridge protocol data unit detected on the intra-hub communication path.
    Type: Grant
    Filed: November 14, 2000
    Date of Patent: February 15, 2005
    Assignee: 3Com Corporation
    Inventors: Carl John Lindeborg, Mark David Moreau, Keith Louis Petry, John Ernest Ziegler