Patents by Inventor David Morrill

David Morrill has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260166256
    Abstract: Disclosed herein are devices, systems and methods for monitoring and/or controlling respiration in a subject, particularly an infant during sleep. Systems disclosed herein include a mattress and a wearable sensing device, capable of monitoring various physiological parameters of the subject, including blood oxygen level. The mattress provides various vibrational stimulation modes to the infant, including sub-arousal and/or arousal mode, depending on the monitored physiological parameters of the infant.
    Type: Application
    Filed: September 30, 2025
    Publication date: June 18, 2026
    Inventors: David PAYDARFAR, James NIEMI, John KONSIN, David MORRILL
  • Publication number: 20200086066
    Abstract: The invention features devices that measure the pressure of an injection or intrinsic physiologic pressures generated and measures the fluid content, e.g., blood content, of aspirated fluid during medical interventions requiring hypodermic needles, e.g., fluid sampling or medical injection procedures. The devices feature pressure and fluid content, e.g., blood, sensors that trigger indicators to alert the user of an issue during the procedure(s). The invention features a flexible cover for devices of the invention to facilitate introduction of a device into a sterile field. The invention also provides methods of using such devices and covers.
    Type: Application
    Filed: May 3, 2018
    Publication date: March 19, 2020
    Inventors: Brendan RIORDAN, Alexander ABESS, David MORRILL, Travis EMERY, Annie HANG, Katelyn JONES, Kelly Anne MCELREATH, Jack KIRSCH
  • Patent number: 7382593
    Abstract: An ESD protection circuit for an input/output pad of an IC is disclosed with discharge paths to both a power rail and ground. The ESD circuit is arranged with NMOS and PMOS transistors arranged with their drains connected to the pad. However, the drain capacitances have voltage sensitivities that compensate or cancel each other, and with proper sizing the capacitance load on the pad can be made substantially constant over a given voltage range. By providing a discharge path to a power rail, the ESD circuit may be designed to be more tolerant of overvoltages on the power rail.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: June 3, 2008
    Inventors: Myron Miske, David Morrill
  • Publication number: 20070057827
    Abstract: A clock circuit for outputting serial data without using a PLL is described. The clock is a VCO designed to start at a frequency that is slightly higher than necessary to preserve the data. The frequency of the clock is measured and if the frequency is too high or too low the DC control voltage for the VCO is changed to bring the VCO frequency back to the start frequency. Clock counters, holding registers, comparators, and a D/A form a feed back path around a VCO. In addition, a word boundary generator is used to define individual data words. The word boundary is formed by the absence of a bit clock transition while there is a data bit transition. A high/low threshold may be used where the VCO frequency, as measured, must transcend a threshold before the DC control voltage to the VCO is changed.
    Type: Application
    Filed: September 14, 2005
    Publication date: March 15, 2007
    Inventor: David Morrill
  • Publication number: 20070058305
    Abstract: An ESD protection circuit for an input/output pad of an IC is disclosed with discharge paths to both a power rail and ground. The ESD circuit is arranged with NMOS and PMOS transistors arranged with their drains connected to the pad. However, the drain capacitances have voltage sensitivities that compensate or cancel each other, and with proper sizing the capacitance load on the pad can be made substantially constant over a given voltage range. By providing a discharge path to a power rail, the ESD circuit may be designed to be more tolerant of overvoltages on the power rail.
    Type: Application
    Filed: September 14, 2005
    Publication date: March 15, 2007
    Inventors: Myron Miske, David Morrill