Patents by Inventor David Mothersole
David Mothersole has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5021991Abstract: A system for interfacing a Processor to a Coprocessor using standard bus cycles. The Processor, upon encountering in its instruction stream an instruction having a particular Operation word format, will transfer a Command word following the Operation word to a particular Coprocessor designated by a Coprocessor Identity field in the Operation word. Upon decoding the Command word, the Coprocessor will respond with any of a set of response primitives which define functions which the Coprocessor requires to Processor to perform in support of the Command by the Coprocessor. The interface provides for all functions which the Coprocessor may require, including selective vectoring to appropriate exception handlers.Type: GrantFiled: September 18, 1987Date of Patent: June 4, 1991Assignee: Motorola, Inc.Inventors: Douglas B. MacGregor, John Zolnowsky, David Mothersole
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Patent number: 4994961Abstract: A system for interfacing a Processor to a Coprocessor using standard bus cycles. The Processor, upon encountering in its instruction stream an instruction having a particular Operation word format, will transfer a Command word following the Operation word to a particular Coprocessor designated by a Coprocessor Identity field in the Operation word. Upon decoding the Command word, the Coprocessor will respond with any of a set of response primitives which define functions which the Coprocessor requires to Processor to perform in support of the Command by the Coprocessor. The interface provides for all functions which the Coprocessor may require, including selective vectoring to appropriate exception handlers.Type: GrantFiled: September 18, 1987Date of Patent: February 19, 1991Assignee: Motorola, Inc.Inventors: Douglas B. MacGregor, John Zolnowsky, David Mothersole
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Patent number: 4914578Abstract: A system for interfacing a Processor to a Coprocessor using standard bus cycles. The Processor, upon encountering in its instruction stream an instruction having a particular Operation word format, will transfer a Command word following the Operation word to a particular Coprocessor designated by a Coprocessor Identity field in the Operation word. Upon decoding the Command word, the Coprocessor will respond with any of a set of response primitives which define functions which the Coprocessor requires to Processor to perform in support of the Command by the Coprocessor. The interface provides for all functions which the Coprocessor may require, including selective vectoring to appropriate exception handlers.Type: GrantFiled: January 31, 1986Date of Patent: April 3, 1990Assignee: Motorola, Inc.Inventors: Douglas B. MacGregor, David Mothersole, John Zolnowsky
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Patent number: 4821231Abstract: A system for interfacing a Processor to a Coprocessor using standard bus cycles. The Processor, upon encountering in its instruction stream an instruction having a particular Operation word format, will transfer a Command word following the Operation word to a particular Coprocessor designated by a Coprocessor Identity field in the Operation word, Upon decoding the Command word, the Coprocessor will respond with any of a set of response primitives whcih define functions which the Coprocessor requires to Processor to perform in support of the Command by the Coprocessor. The interface provides for all functions which the Coprocessor may require, including selective vectoring to appropriate exception handlers.Type: GrantFiled: December 21, 1987Date of Patent: April 11, 1989Assignee: Motorola, Inc.Inventors: Michael Cruess, David Mothersole, John Zolnowsky, Douglas B. MacGregor
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Patent number: 4811274Abstract: A system for interfacing a Processor to a Coprocessor using standard bus cycles. The Processor, upon encountering in its instruction stream an instruction having a particular Operation word format, will transfer a Command word following the Operation word to a particular Coprocessor designated by a Coprocessor Identity field in the Operation word. Upon decoding the Command word, the Coprocessor will respond with any of a set of response primitives which define functions which the Coprocessor requires to Processor to perform in support of the Command by the Coprocessor. The interface provides for all functions which the Coprocessor may require, including selective vectoring to appropriate exception handlers.Type: GrantFiled: September 14, 1987Date of Patent: March 7, 1989Assignee: Motorola, Inc.Inventors: Michael Cruess, David Mothersole, John Zolnowsky, Douglas B. MacGregor
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Patent number: 4758978Abstract: A system for interfacing a Processor to a Coprocessor using standard bus cycles. The Processor, upon encountering in its instruction stream an instruction having a particular Operation word format, will transfer a Command word following the operation word to a particular Coprocessor designated by a Coprocessor Identity field in the Operation word. Upon decoding the Command word, the Coprocessor will respond with any of a set of response primitives which define functions which the Coprocessor requires the Processor to perform in support of the Command by the Coprocessor. The interface provides for all functions which the Coprocessor may require, including selective vectoring to appropriate exception handlers.Type: GrantFiled: September 18, 1986Date of Patent: July 19, 1988Assignee: Motorola, Inc.Inventors: Michael Cruess, David Mothersole, John Zolnowsky, Douglas B. MacGregor
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Patent number: 4750110Abstract: A system for interfacing a Processor to a Coprocessor using standard bus cycles. The processor, upon encountering in its instruction stream an instruction having a particular Operation word format, will transfer a Command word following the Operation word to a particular Coprocessor designated by a Coprocessor Identity field in the Operation word. Upon decoding the Command word, the Coprocessor will respond with any of a set of response primitives which define functions which the Coprocessor requires the Processor to perform in support of the Command by the Coprocessor. The interface provides for all functions which the Coprocessor may require, including selective vectoring to appropriate exception handlers.Type: GrantFiled: April 18, 1983Date of Patent: June 7, 1988Assignee: Motorola, Inc.Inventors: David Mothersole, John Zolnowsky, Douglas B. MacGregor
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Patent number: 4731736Abstract: A system for interfacing a Processor to a Coprocessor using standard bus cycles. The Processor, upon encountering in its instruction stream an instruction having a particular Operation word format, will transfer a Command word following the Operation word to a particular Coprocessor designated by a Coprocessor Identity field in the Operation word. Upon decoding the Command word, the Coprocessor will respond with any of a set of response primitives which define functions which the Coprocessor requires to Processor to perform in support of the Command by the Coprocessor. The interface provides for all functions which the Coprocessor may require, including selective vectoring to appropriate exception handlers.Type: GrantFiled: September 18, 1986Date of Patent: March 15, 1988Assignee: Motorola, Inc.Inventors: David Mothersole, Douglas B. MacGregor, John Zolnowsky
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Patent number: 4715013Abstract: A system for interfacing a processor to a Coprocessor using standard bus cycles. The processor, upon encountering in its instruction stream an instruction having a particular Operation word format, will transfer a Command word following the Operation word to a particular Coprocessor designated by a Coprocessor Identity field in the Operation word. Upon decoding the Command word, the Coprocessor will respond with any of a set of response primitives which define functions which the Coprocessor requires to Processor to perform in support of the Command by the Coprocessor. The interface provides for all functions which the Coprocessor may require, including selective vectoring to appropriate exception handlers.Type: GrantFiled: July 25, 1986Date of Patent: December 22, 1987Assignee: Motorola, Inc.Inventors: Douglas B. MacGregor, John Zolnowsky, David Mothersole