Patents by Inventor David Mulvenna

David Mulvenna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5877741
    Abstract: A system and method for processing overlay display data. A display FIFO pipeline processes background graphics display data and a separate overlay FIFO pipeline processes overlay display data stored in an off-screen part of a graphics memory. The overlay FIFO pipeline performs format conversion, interpolation and scaling on the overlay display data and outputs it to an overlay mux. The overlay mux selects between the outputs of the display FIFO pipeline and the overlay FIFO pipeline in the processing of each scan line.
    Type: Grant
    Filed: April 19, 1996
    Date of Patent: March 2, 1999
    Assignee: Seiko Epson Corporation
    Inventors: Lawrence P. Chee, John David Mulvenna
  • Patent number: 5724063
    Abstract: A computer system includes a dual-panel monochrome or color liquid crystal display (LCD). A dynamic random access memory (DRAM) of the computer includes a defined virtual memory array representative of pixel locations of the dual-panel LCD. Pixel values are read from the virtual array of the DRAM and written to corresponding locations of the display by a display pipeline. The writing of pixel values to the display proceeds pixel-by-pixel across a row of pixels in a panel, and then to the next row of pixels until a panel is refreshed. The panels of the array are refreshed one at a time alternating between an upper panel of the display and a lower panel of the display. While one panel is being refreshed, the other panel is blanked. Consequently, the dual-panel display may be driven with a simplified structure of display pipeline, and with a reduced time requirement for access to the DRAM.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 3, 1998
    Assignee: Seiko Epson Corporation
    Inventors: Lawrence Chee, David Mulvenna
  • Patent number: 5210858
    Abstract: A clocking control circuit for a computer system and method for receiving a microprocessor clock signal which drives a microprocessor and for supplying a support clock signal having a lower frequency. The support clock frequency drives support interface circuitry such as a peripheral controller, a CPU/memory controller, and a bus bridge interface, and thus causes the support interface circuitry to operate at a lower frequency than the microprocessor. The clocking control circuit ensures synchronization between the support clocking signal and the microprocessor clocking signal. The transmission of control signals between the microprocessor and support interface circuitry is controlled to ensure proper communications between the microprocessor and support circuitry.
    Type: Grant
    Filed: October 17, 1989
    Date of Patent: May 11, 1993
    Inventors: Jan E. B. Jensen, Keith S. K. Lee, J. David Mulvenna, Keith B. Riley