Patents by Inventor David Murphy

David Murphy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11126477
    Abstract: Methods and apparatus consistent with the invention provide the ability to organize and build understandings of machine data generated by a variety of information-processing environments. Machine data is a product of information-processing systems (e.g., activity logs, configuration files, messages, database records) and represents the evidence of particular events that have taken place and been recorded in raw data format. In one embodiment, machine data is turned into a machine data web by organizing machine data into events and then linking events together.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: September 21, 2021
    Assignee: Splunk Inc.
    Inventors: Michael Joseph Baum, R. David Carasso, Robin Kumar Das, Bradley Hall, Brian Philip Murphy, Stephen Phillip Sorkin, Andre David Stechert, Erik M. Swan, Rory Greene, Nicholas Christian Mealy, Christina Frances Regina Noren
  • Patent number: 11119833
    Abstract: Methods and apparatus consistent with the invention provide the ability to organize and build understandings of machine data generated by a variety of information-processing environments. Machine data is a product of information-processing systems (e.g., activity logs, configuration files, messages, database records) and represents the evidence of particular events that have taken place and been recorded in raw data format. In one embodiment, machine data is turned into a machine data web by organizing machine data into events and then linking events together.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: September 14, 2021
    Assignee: Splunk Inc.
    Inventors: Michael Joseph Baum, R. David Carasso, Robin Kumar Das, Bradley Hall, Brian Philip Murphy, Stephen Phillip Sorkin, Andre David Stechert, Erik M. Swan, Rory Greene, Nicholas Christian Mealy, Christina Frances Regina Noren
  • Publication number: 20210263532
    Abstract: In example implementations, an apparatus is provided. The apparatus includes a communication interface, a memory, a moving mechanism, and a processor. The communication interface is to receive a request to initiate a telepresence session. The memory is to store a location policy. The moving mechanism is to move the apparatus to a selected telepresence location to initiate the telepresence session based on the location policy. The processor is communicatively coupled to the communication interface, the memory and the moving mechanism. The processor is to determine the selected telepresence location to initiate the telepresence session in response to the request before the telepresence session is initiated.
    Type: Application
    Filed: November 16, 2018
    Publication date: August 26, 2021
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: William J. Allen, David Murphy
  • Publication number: 20210112019
    Abstract: Embodiments of an interconnect apparatus advantageously useful in handling Big Data Graph Analytics enable improved signal integrity, even at high clock rates, increased bandwidth, and lower latency. In an interconnect apparatus for core arrays a sending processing core can send data to a receiving core by forming a packet whose header indicates the location of the receiving core and whose pay load is the data to be sent. The packet is sent to a Data Vortex switch described herein and in the patents incorporated herein. The Data Vortex switch is on the same chip as an array of processing cores and routes the packet to the receiving core first by routing the packet to the processing core array containing the receiving processing core. The Data Vortex switch then routes the packet to the receiving processor core in a processor core array.
    Type: Application
    Filed: November 12, 2020
    Publication date: April 15, 2021
    Applicant: Interactic Holding, LLC
    Inventors: Coke S. Reed, David Murphy, Ronald R. Denny, Michael R. Ives, Reed Devany
  • Patent number: 10924452
    Abstract: Techniques are disclosed for auditing an IP address prefix that has been assigned to an entity as part of an administrator policy, to determine whether the assignment was implemented on the network. In an embodiment, associations between IP addresses and their assignment are stored in a database. IP addresses are read and semi-authoritative sources (e.g., DNS servers) are queried for information about the IP addresses. Information received in response to the query may be used to validate the IP address (e.g., in a network, all IP addresses used for VM instances will have a corresponding URL in a specific format).
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: February 16, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Leonid Valentinovich Nikolayev, Michael Brooke Furr, Ryan David Murphy, Kevin Christopher Miller
  • Patent number: 10919064
    Abstract: Dispenser systems, dispensers, and repositories can add a fragrance to an unscented liquid beauty preparation. The dispenser system includes a dispenser having a cavity for retaining at least a first liquid, and a repository configured for removably attaching to the dispenser, the repository having a reservoir for retaining at least a second liquid. The dispenser is coupled with a pump assembly including at least one pump for drawing the at least a first liquid and the at least a second liquid into a mixing chamber. The mixing chamber is coupled with an actuator in such a manner that when the actuator is pressed down by an external force, the mixing chamber communicates with the pump to suction the first and second liquids into the mixing chamber to form a liquid mixture for dispensing through a nozzle.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: February 16, 2021
    Inventors: Thomas Ortiz, David Wintroub, David Murphy
  • Patent number: 10913611
    Abstract: A conveyor apparatus comprising an elongated endless flexible conveyor belt having a moulded ridged conformation on its inner surface mounted between a drive roller drum and a take up roller drum, two elongated conveyor side plates and a plurality of idle conveyor rollers, wherein the diameter of the drive roller drum and the take up roller drum is uniform throughout their length.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: February 9, 2021
    Inventors: David Murphy, Dermot Murphy
  • Patent number: 10902249
    Abstract: One example of a video monitoring system includes a frame acquisition subsystem, a stage gate motion detection subsystem, a person detection subsystem, a face recognition subsystem, and an alert emission subsystem. The frame acquisition subsystem extracts frames from an input video. The stage gate motion detection subsystem separates background motion from foreground motion within frames. The person detection subsystem detects people including faces and bodies within the foreground motion. The face recognition subsystem matches detected faces to previously registered users. The alert emission subsystem provides alerts based on events detected by the stage gate motion subsystem, the person detection subsystem, and the face recognition subsystem.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: January 26, 2021
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: David Murphy, Thiago Jose Da Silva, Qian Lin, Madhu Athreya, Caio Northfleet
  • Patent number: 10893003
    Abstract: Embodiments of an interconnect apparatus enable improved signal integrity, even at high clock rates, increased bandwidth, and lower latency. In an interconnect apparatus for core arrays a sending processing core can send data to a receiving core by forming a packet whose header indicates the location of the receiving core and whose pay load is the data to be sent. The packet is sent to a Data Vortex switch described herein and in the patents incorporated herein. The Data Vortex switch is on the same chip as an array of processing cores and routes the packet to the receiving core first by routing the packet to the processing core array containing the receiving processing core. The Data Vortex switch then routes the packet to the receiving processor core in a processor core array. Since the Data Vortex switches are not crossbar switches, there is no need to globally set and reset the Data Vortex switches as different groups of packets enter the switches.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: January 12, 2021
    Inventors: Coke S. Reed, David Murphy, Ronald R. Denny, Michael R. Ives, Reed Devany
  • Publication number: 20200334887
    Abstract: An example control system includes a memory and at least one processor to obtain image data from a given region and perform image analysis on the image data to detect a set of objects in the given region. For each object of the set, the example Memory control system may classify each object as being one of multiple predefined classifications of object permanency, including (i) a fixed classification, (ii) a static and fixed classification, and/or (iii) a dynamic classification. The control system may generate at least a first layer of a occupancy map for the given region that depicts each detected Instructions To Perform object that is of the static and fixed classification and excluding each detected object that is either of the static and unfixed classification or of the dynamic classification.
    Type: Application
    Filed: October 31, 2017
    Publication date: October 22, 2020
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Jonathan Salfity, David Murphy, Will Allen
  • Publication number: 20200300639
    Abstract: An example robot performs a scan to obtain image data of a given region. The robot performs image analysis on the image data to detect a set of undesirable objects, and generates a reference map that excludes the set of undesirable objects, where the reference map is associated with the location of the robot at the time of the scan.
    Type: Application
    Filed: October 31, 2017
    Publication date: September 24, 2020
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Jonathan Salfity, David Murphy
  • Publication number: 20200195584
    Abstract: Embodiments of an interconnect apparatus enable improved signal integrity, even at high clock rates, increased bandwidth, and lower latency. In an interconnect apparatus for core arrays a sending processing core can send data to a receiving core by forming a packet whose header indicates the location of the receiving core and whose pay load is the data to be sent. The packet is sent to a Data Vortex switch described herein and in the patents incorporated herein. The Data Vortex switch is on the same chip as an array of processing cores and routes the packet to the receiving core first by routing the packet to the processing core array containing the receiving processing core. The Data Vortex switch then routes the packet to the receiving processor core in a processor core array. Since the Data Vortex switches are not crossbar switches, there is no need to globally set and reset the Data Vortex switches as different groups of packets enter the switches.
    Type: Application
    Filed: December 12, 2019
    Publication date: June 18, 2020
    Applicant: Interactic Holding, LLC
    Inventors: Coke S. Reed, David Murphy, Ronald R. Denny, Michael R. Ives, Reed Devany
  • Publication number: 20200162084
    Abstract: In some aspects, the disclosure is directed to methods and systems for utilizing a thin-film bulk acoustic resonator (FBAR) as a frequency reference for a phase-locked loop (PLL) circuit controlling frequency of a voltage controlled oscillator (VCO). In some implementations, the FBAR-based oscillator may be used as a reference to an analog or digital PLL circuit (either directly, or divided to a lower frequency). In other implementations, the FBAR-based oscillator may be used as a reference to a mixing-based PLL rather than a dividing-based PLL. Through these implementations, the noise contribution of many of the PLL circuit components or elements may be reduced (e.g. noise from a delta-sigma modulator (DSM), multiple modulus divider (MMD), phase frequency detector (PFD)/charge pump (CP), etc.).
    Type: Application
    Filed: November 12, 2019
    Publication date: May 21, 2020
    Inventors: Hooman DARABI, David MURPHY, Arya BEHZAD, Dihang YANG, Hung-Ming CHIEN, Choong Yul CHA
  • Patent number: 10659877
    Abstract: According to examples, an apparatus may include a processor and a memory on which is stored machine readable instructions that are to cause the processor to determine a reference frame from a plurality of frames received at multiple different times, in which each of the plurality of frames includes audio signal data, and in which the reference frame includes audio signal data that identifies a highest audio signal level among audio signals identified in the plurality of frames. The reference frame may be time-aligned with each of the plurality of frames other than the reference frame to obtain respective time-aligned frames. The audio signals identified in each of the respective time-aligned frames may be added together to generate respective added audio signals. The respective added audio signals may be combined together to obtain a combined audio signal and the combined audio signal may be outputted.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: May 19, 2020
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sunil Bharitkar, Madhu Sudan Athreya, David Murphy
  • Patent number: 10630607
    Abstract: An interconnect apparatus enables improved signal integrity, even at high clock rates, increased bandwidth, and lower latency. An interconnect apparatus can comprise a plurality of logic units and a plurality of buses coupling the plurality of logic units in a selected configuration of logic units arranged in triplets comprising logic units LA, LC, and LD. The logic units LA and LC are positioned to send data to the logic unit LD. The logic unit LC has priority over the logic unit LA to send data to the logic unit LD.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: April 21, 2020
    Assignee: Interactic Holdings, LLC
    Inventors: Coke S. Reed, David Murphy
  • Publication number: 20190387313
    Abstract: According to examples, an apparatus may include a processor and a memory on which is stored machine readable instructions that are to cause the processor to determine a reference frame from a plurality of frames received at multiple different times, in which each of the plurality of frames includes audio signal data, and in which the reference frame includes audio signal data that identifies a highest audio signal level among audio signals identified in the plurality of frames. The reference frame may be time-aligned with each of the plurality of frames other than the reference frame to obtain respective time-aligned frames. The audio signals identified in each of the respective time-aligned frames may be added together to generate respective added audio signals. The respective added audio signals may be combined together to obtain a combined audio signal and the combined audio signal may be outputted.
    Type: Application
    Filed: March 8, 2017
    Publication date: December 19, 2019
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Sunil Bharitkar, Madhu Sudan Athreya, David Murphy
  • Publication number: 20190358553
    Abstract: Systems, devices, and methods for a plush toy having an outer surface; one or more male interlocking buttons disposed on the outer surface of the plush toy; and one or more female interlocking buttons disposed on the outer surface of the plush toy; wherein the one or more male interlocking buttons and the one or more female interlocking buttons form an interlocked pair when the one or more male interlocking buttons are detachably attached to the one or more female interlocking buttons; where detachably attaching the one or more male interlocking buttons to the one or more female interlocking buttons produces an audible sound; and where the interlocked pair forms a closed loop configured to secure the plush toy about an external object.
    Type: Application
    Filed: May 28, 2019
    Publication date: November 28, 2019
    Inventor: David Murphy
  • Patent number: D873355
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: January 21, 2020
    Assignee: SNAP POP
    Inventor: David Murphy
  • Patent number: D914499
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: March 30, 2021
    Assignee: Modafino, LLC
    Inventors: David Wintroub, Thomas Ortiz, David Murphy
  • Patent number: D914514
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: March 30, 2021
    Inventors: David Wintroub, Thomas Ortiz, David Murphy