Patents by Inventor David N. Ruzic
David N. Ruzic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210343513Abstract: An electrical power pulse generator system and a method of the system's operation are described herein. A main energy storage capacitor supplies a negative DC power and a kick energy storage capacitor supplies a positive DC power. A main pulse power transistor is interposed between the main energy storage capacitor and an output pulse rail and includes a main power transmission control input for controlling power transmission from the main energy storage capacitor to the output pulse rail. A positive kick pulse power transistor is interposed between the kick energy storage capacitor and the output pulse rail and includes a kick power transmission control input for controlling power transmission from the kick energy storage capacitor to the output pulse rail. A positive kick pulse power transistor control line is connected to the kick power transmission control input of the positive kick pulse transistor.Type: ApplicationFiled: July 14, 2021Publication date: November 4, 2021Inventors: David N. Ruzic, Robert Andrew Stubbers, Brian Edward Jurczyk
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Patent number: 11069515Abstract: An electrical power pulse generator system and a method of the system's operation are described herein. A main energy storage capacitor supplies a negative DC power and a kick energy storage capacitor supplies a positive DC power. A main pulse power transistor is interposed between the main energy storage capacitor and an output pulse rail and includes a main power transmission control input for controlling power transmission from the main energy storage capacitor to the output pulse rail. A positive kick pulse power transistor is interposed between the kick energy storage capacitor and the output pulse rail and includes a kick power transmission control input for controlling power transmission from the kick energy storage capacitor to the output pulse rail. A positive kick pulse power transistor control line is connected to the kick power transmission control input of the positive kick pulse transistor.Type: GrantFiled: June 12, 2018Date of Patent: July 20, 2021Assignee: Starfire Industries LLCInventors: David N. Ruzic, Robert Andrew Stubbers, Brian Edward Jurczyk
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Patent number: 10752994Abstract: An apparatus for depositing a coating on a substrate at atmospheric pressure comprises (a) a plasma torch comprising a microwave source coupled to an antenna disposed within a chamber having an open end, the chamber comprising a gas inlet for flow of a gas over the antenna to generate a plasma jet; (b) a substrate positioned outside the open end of the chamber a predetermined distance away from a tip of the antenna; and (c) a target material to be coated on the substrate disposed at the tip of the antenna.Type: GrantFiled: November 21, 2018Date of Patent: August 25, 2020Assignee: THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOISInventors: David N. Ruzic, Yuilun Wu, Ivan Shchelkanov, Jungmi Hong, Zihao Ouyang, Tae Seung Cho
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Patent number: 10531553Abstract: Systems and methods are described herein for generating surface-wave plasmas capable of simultaneously achieving high density with low temperature and planar scalability. A key feature of the invention is reduced damage to objects in contact with the plasma due to the lack of an RF bias; allowing for damage free processing. The preferred embodiment is an all-in-one processing reactor suitable for photovoltaic cell manufacturing, performing saw-damage removal, oxide stripping, deposition, doping and formation of hetero structures. The invention is scalable for atomic-layer deposition, etching, and other surface interaction processes.Type: GrantFiled: January 4, 2018Date of Patent: January 7, 2020Assignee: STARFIRE INDUSTRIES, LLCInventors: David N. Ruzic, Robert A. Stubbers, Brian E. Jurczyk
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Patent number: 10510550Abstract: A method of laser-assisted plasma etching with polarized light comprises providing a surface of a substrate that includes at least one surface region having trenches arranged in a unidirectional pattern along an x-direction or a y-direction of the surface, where each trench has a depth along a z-direction. The trenches extend substantially in parallel with each other and have a half-pitch of about 100 nm or less. The surface is exposed to a plasma and simultaneously illuminated with a pulsed laser beam having a predetermined polarization along the x-direction or the y-direction, and the trenches are etched.Type: GrantFiled: September 25, 2018Date of Patent: December 17, 2019Assignee: The Board of Trustees of the University of IllinoisInventors: Jason A. Peck, David N. Ruzic
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Patent number: 10332731Abstract: A magnet assembly for use in high power pulsed magnetron sputtering comprises a configuration of magnets having a magnetic field topology comprising magnetic field components Bx, By and Bz. A tangential magnetic field B// distribution on an x-y plane above the configuration of magnets comprising an outer continuous ring and one or more inner continuous rings contained in the outer continuous ring. A total magnetic field Btot distribution on an x-z plane intersecting the configuration of magnets comprises an outer closed loop and one or more inner closed loops contained in the outer closed loop, where, as a function of x, a tangential magnetic field B// alternates between (a) high field values greater than 200 G and high gradients in the z-direction of at least 1000 G/in, and (b) low field values of less than 50 G and low gradients in the z-direction of at most 250 G/in.Type: GrantFiled: October 8, 2015Date of Patent: June 25, 2019Assignee: The Board of Trustees of the University of IllinoisInventors: David N. Ruzic, Ivan A. Shchelkanov, Priya Raman
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Publication number: 20190096684Abstract: A method of laser-assisted plasma etching with polarized light comprises providing a surface of a substrate that includes at least one surface region having trenches arranged in a unidirectional pattern along an x-direction or a y-direction of the surface, where each trench has a depth along a z-direction. The trenches extend substantially in parallel with each other and have a half-pitch of about 100 nm or less. The surface is exposed to a plasma and simultaneously illuminated with a pulsed laser beam having a predetermined polarization along the x-direction or the y-direction, and the trenches are etched.Type: ApplicationFiled: September 25, 2018Publication date: March 28, 2019Inventors: Jason A. Peck, David N. Ruzic
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Publication number: 20190093229Abstract: An apparatus for depositing a coating on a substrate at atmospheric pressure comprises (a) a plasma torch comprising a microwave source coupled to an antenna disposed within a chamber having an open end, the chamber comprising a gas inlet for flow of a gas over the antenna to generate a plasma jet; (b) a substrate positioned outside the open end of the chamber a predetermined distance away from a tip of the antenna; and (c) a target material to be coated on the substrate disposed at the tip of the antenna.Type: ApplicationFiled: November 21, 2018Publication date: March 28, 2019Applicant: The Board of Trustees of the University of IllinoisInventors: David N. Ruzic, Yuilun Wu, Ivan Shchelkanov, Jungmi Hong, Zihao Ouyang, Tae Seung Cho
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Patent number: 10167556Abstract: An apparatus for depositing a coating on a substrate at atmospheric pressure comprises (a) a plasma torch comprising a microwave source coupled to an antenna disposed within a chamber having an open end, the chamber comprising a gas inlet for flow of a gas over the antenna to generate a plasma jet; (b) a substrate positioned outside the open end of the chamber a predetermined distance away from a tip of the antenna; and (c) a target material to be coated on the substrate disposed at the tip of the antenna.Type: GrantFiled: March 13, 2015Date of Patent: January 1, 2019Assignee: THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOISInventors: David N. Ruzic, Yuilun Wu, Ivan Shchelkanov, Jungmi Hong, Zihao Ouyang, Tae Seung Cho
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Publication number: 20180358213Abstract: An electrical power pulse generator system and a method of the system's operation are described herein. A main energy storage capacitor supplies a negative DC power and a kick energy storage capacitor supplies a positive DC power. A main pulse power transistor is interposed between the main energy storage capacitor and an output pulse rail and includes a main power transmission control input for controlling power transmission from the main energy storage capacitor to the output pulse rail. A positive kick pulse power transistor is interposed between the kick energy storage capacitor and the output pulse rail and includes a kick power transmission control input for controlling power transmission from the kick energy storage capacitor to the output pulse rail. A positive kick pulse power transistor control line is connected to the kick power transmission control input of the positive kick pulse transistor.Type: ApplicationFiled: June 12, 2018Publication date: December 13, 2018Inventors: David N. Ruzic, Robert Andrew Stubbers, Brian Edward Jurczyk
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Publication number: 20180199423Abstract: Systems and methods are described herein for generating surface-wave plasmas capable of simultaneously achieving high density with low temperature and planar scalability. A key feature of the invention is reduced damage to objects in contact with the plasma due to the lack of an RF bias; allowing for damage free processing. The preferred embodiment is an all-in-one processing reactor suitable for photovoltaic cell manufacturing, performing saw-damage removal, oxide stripping, deposition, doping and formation of hetero structures. The invention is scalable for atomic-layer deposition, etching, and other surface interaction processes.Type: ApplicationFiled: January 4, 2018Publication date: July 12, 2018Inventors: David N. Ruzic, Robert A. Stubbers, Brian E. Jurczyk
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Patent number: 9867269Abstract: Systems and methods are described herein for generating surface-wave plasmas capable of simultaneously achieving high density with low temperature and planar scalability. A key feature of the invention is reduced damage to objects in contact with the plasma due to the lack of an RF bias; allowing for damage free processing. The preferred embodiment is an all-in-one processing reactor suitable for photovoltaic cell manufacturing, performing saw-damage removal, oxide stripping, deposition, doping and formation of heterostructures. The invention is scalable for atomic-layer deposition, etching, and other surface interaction processes.Type: GrantFiled: March 17, 2014Date of Patent: January 9, 2018Assignee: STARFIRE INDUSTRIES, LLCInventors: David N. Ruzic, Robert A. Stubbers, Brian E. Jurczyk
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Publication number: 20160104607Abstract: A magnet assembly for use in high power pulsed magnetron sputtering comprises a configuration of magnets having a magnetic field topology comprising magnetic field components Bx, By and Bz. A tangential magnetic field B// distribution on an x-y plane above the configuration of magnets comprising an outer continuous ring and one or more inner continuous rings contained in the outer continuous ring. A total magnetic field Btot distribution on an x-z plane intersecting the configuration of magnets comprises an outer closed loop and one or more inner closed loops contained in the outer closed loop, where, as a function of x, a tangential magnetic field B// alternates between (a) high field values greater than 200 G and high gradients in the z-direction of at least 1000 G/in, and (b) low field values of less than 50 G and low gradients in the z-direction of at most 250 G/in.Type: ApplicationFiled: October 8, 2015Publication date: April 14, 2016Inventors: David N. Ruzic, Ivan A. Shchelkanov, Priya Raman
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Patent number: 9171733Abstract: A method of selectively etching a three-dimensional (3-D) structure includes generating a plasma in contact with the 3-D structure, and illuminating a designated portion of the 3-D structure with a laser beam while the plasma is being generated. Nonilluminated portions of the 3-D structure are etched at a first etch rate, and the designated portion of the 3-D structure is etched at a second etch rate, where the second etch rate is different from the first etch rate.Type: GrantFiled: January 24, 2012Date of Patent: October 27, 2015Assignee: The Board of Trustees of the University of IllinoisInventors: David N. Ruzic, John R. Sporre
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Publication number: 20150259802Abstract: An apparatus for depositing a coating on a substrate at atmospheric pressure comprises (a) a plasma torch comprising a microwave source coupled to an antenna disposed within a chamber having an open end, the chamber comprising a gas inlet for flow of a gas over the antenna to generate a plasma jet; (b) a substrate positioned outside the open end of the chamber a predetermined distance away from a tip of the antenna; and (c) a target material to be coated on the substrate disposed at the tip of the antenna.Type: ApplicationFiled: March 13, 2015Publication date: September 17, 2015Inventors: David N. Ruzic, Yuilun Wu, Ivan Shchelkanov, Jungmi Hong, Zihao Ouyang, Tae Seung Cho
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Publication number: 20140315347Abstract: Systems and methods are described herein for generating surface-wave plasmas capable of simultaneously achieving high density with low temperature and planar scalability. A key feature of the invention is reduced damage to objects in contact with the plasma due to the lack of an RF bias; allowing for damage free processing. The preferred embodiment is an all-in-one processing reactor suitable for photovoltaic cell manufacturing, performing saw-damage removal, oxide stripping, deposition, doping and formation of heterostructures. The invention is scalable for atomic-layer deposition, etching, and other surface interaction processes.Type: ApplicationFiled: March 17, 2014Publication date: October 23, 2014Applicant: Starfire Industries, LLCInventors: David N. Ruzic, Michael P. Reilly, Piyum S. Zoonoz, Robert A. Stubbers, Brian E. Jurczyk
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Publication number: 20130309873Abstract: A method of selectively etching a three-dimensional (3-D) structure includes generating a plasma in contact with the 3-D structure, and illuminating a designated portion of the 3-D structure with a laser beam while the plasma is being generated. Nonilluminated portions of the 3-D structure are etched at a first etch rate, and the designated portion of the 3-D structure is etched at a second etch rate, where the second etch rate is different from the first etch rate.Type: ApplicationFiled: January 24, 2012Publication date: November 21, 2013Inventors: David N. Ruzic, John R. Sporre
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Patent number: 8486843Abstract: A method of forming a nanoscale three-dimensional pattern in a porous semiconductor includes providing a film comprising a semiconductor material and defining a nanoscale metal pattern on the film, where the metal pattern has at least one lateral dimension of about 100 nm or less in size. Semiconductor material is removed from below the nanoscale metal pattern to create trenches in the film having a depth-to-width aspect ratio of at least about 10:1, while pores are formed in remaining portions of the film adjacent to the trenches. A three-dimensional pattern having at least one nanoscale dimension is thus formed in a porous semiconductor, which may be porous silicon. The method can be extended to form self-integrated porous low-k dielectric insulators with copper interconnects, and may also facilitate wafer level chip scale packaging integration.Type: GrantFiled: September 1, 2009Date of Patent: July 16, 2013Assignee: The Board of Trustrees of the University of IllinoisInventors: Xiuling Li, David N. Ruzic, Ik Su Chun, Edmond K. C. Chow, Randolph E. Flauta
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Publication number: 20110263119Abstract: A method of forming a nanoscale three-dimensional pattern in a porous semiconductor includes providing a film comprising a semiconductor material and defining a nanoscale metal pattern on the film, where the metal pattern has at least one lateral dimension of about 100 nm or less in size. Semiconductor material is removed from below the nanoscale metal pattern to create trenches in the film having a depth-to-width aspect ratio of at least about 10:1, while pores are formed in remaining portions of the film adjacent to the trenches. A three-dimensional pattern having at least one nanoscale dimension is thus formed in a porous semiconductor, which may be porous silicon. The method can be extended to form self-integrated porous low-k dielectric insulators with copper interconnects, and may also facilitate wafer level chip scale packaging integration.Type: ApplicationFiled: September 1, 2009Publication date: October 27, 2011Inventors: Xiuling Li, David N. Ruzic, Ik Su Chun, Edmond K.C. Chow, Randolph E. Flauta
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Publication number: 20110151270Abstract: Methods of laser assisted plasma coating at atmospheric pressure including providing a plasma, at least one target, at least one laser, and a superalloy substrate, operably directing the laser toward the target to liberate atomic particles from the target and feed the atomic particles into the plasma, and depositing the atomic particles onto the superalloy substrate using the plasma to produce a thermal barrier coating having a column width of from about 0.5 microns to about 60 microns, and an intra column porosity of from about 0% to about 9%.Type: ApplicationFiled: December 18, 2009Publication date: June 23, 2011Inventors: Todd Jay Rockstroh, David N. Ruzic, Bhupendra Kumar Gupta, Nripendra Nath Das